Resetting The Gtp_Dual Tile - Xilinx Virtex-5 RocketIO GTP User Manual

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Resetting the GTP_DUAL Tile

Each GTP_DUAL tile offers several ways to reset its subcomponents.
the different ways of resetting a GTP_DUAL tile, and the subcomponents that are affected
by each type of reset.
Table 5-7: Available Resets Pins and the Components Reset by These Reset Pins
GTP to Board
Termination Resistor
Interface
Calibration
Shared
Shared PLL
Resources
PLL Lock Detection
Reset Control
Power Control
Clocking
DRP
TX PCS
FPGA TX Interface
8B/10B Encoder
TX Buffer
PRBS Generator
Polarity Control
TX PMA
PISO
TX Pre-emphasis
TX OOB & PCI
TX Driver
RX PCS
FPGA RX Interface
RX Buffer
RX Status Control
8B/10B Decoder
Comma Detect and Align
RX LOS State Machine
RX Polarity
PRBS Checker
5x Over-sampler
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Component
www.xilinx.com
Reset
Table 5-7
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