Xilinx Virtex-5 RocketIO GTP User Manual page 300

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Appendix D: DRP Address Map of the GTP_DUAL Tile
Table D-6: DRP Addresses 18 through 1F
Bit
18
CLK_COR_
CLK_COR_
0
SEQ_1_1_1[7]
SEQ_1_2_1[1]
CLK_COR_
CLK_COR_
1
SEQ_1_1_1[6]
SEQ_1_2_1[0]
CLK_COR_
CLK_COR_
2
SEQ_1_1_1[5]
SEQ_1_3_1[9]
CLK_COR_
CLK_COR_
3
SEQ_1_1_1[4]
SEQ_1_3_1[8]
CLK_COR_
CLK_COR_
4
SEQ_1_1_1[3]
SEQ_1_3_1[7]
CLK_COR_
CLK_COR_
5
SEQ_1_1_1[2]
SEQ_1_3_1[6]
CLK_COR_
CLK_COR_
6
SEQ_1_1_1[1]
SEQ_1_3_1[5]
CLK_COR_
CLK_COR_
7
SEQ_1_1_1[0]
SEQ_1_3_1[4]
CLK_COR_
CLK_COR_
8
SEQ_1_2_1[9]
SEQ_1_3_1[3]
CLK_COR_
CLK_COR_
9
SEQ_1_2_1[8]
SEQ_1_3_1[2]
CLK_COR_
CLK_COR_
10
SEQ_1_2_1[7]
SEQ_1_3_1[1]
CLK_COR_
CLK_COR_
11
SEQ_1_2_1[6]
SEQ_1_3_1[0]
CLK_COR_
CLK_COR_
12
SEQ_1_2_1[5]
SEQ_1_4_1[9]
CLK_COR_
CLK_COR_
13
SEQ_1_2_1[4]
SEQ_1_4_1[8]
CLK_COR_
CLK_COR_
14
SEQ_1_2_1[3]
SEQ_1_4_1[7]
CLK_COR_
CLK_COR_
15
SEQ_1_2_1[2]
SEQ_1_4_1[6]
300
19
1A
CLK_COR_
CLK_COR_
SEQ_1_4_1[5]
SEQ_2_1_1[3]
CLK_COR_
CLK_COR_
SEQ_1_4_1[4]
SEQ_2_1_1[2]
CLK_COR_
CLK_COR_
SEQ_1_4_1[3]
SEQ_2_1_1[1]
CLK_COR_
CLK_COR_
SEQ_1_4_1[2]
SEQ_2_1_1[0]
CLK_COR_
CLK_COR_
SEQ_1_4_1[1]
SEQ_2_2_1[9]
CLK_COR_
CLK_COR_
SEQ_1_4_1[0]
SEQ_2_2_1[8]
CLK_COR_
CLK_COR_
SEQ_1_
SEQ_2_2_1[7]
ENABLE_1[4]
CLK_COR_
CLK_COR_
SEQ_1_
SEQ_2_2_1[6]
ENABLE_1[3]
CLK_COR_
CLK_COR_
SEQ_1_
SEQ_2_2_1[5]
ENABLE_1[2]
CLK_COR_
CLK_COR_
SEQ_1_
SEQ_2_2_1[4]
ENABLE_1[1]
CLK_COR_
CLK_COR_
SEQ_2_1_1[9]
SEQ_2_2_1[3]
CLK_COR_
CLK_COR_
SEQ_2_1_1[8]
SEQ_2_2_1[2]
CLK_COR_
CLK_COR_
SEQ_2_1_1[7]
SEQ_2_2_1[1]
CLK_COR_
CLK_COR_
SEQ_2_1_1[6]
SEQ_2_2_1[0]
CLK_COR_
CLK_COR_
SEQ_2_1_1[5]
SEQ_2_3_1[9]
CLK_COR_
CLK_COR_
SEQ_2_1_1[4]
SEQ_2_3_1[8]
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Address
1B
1C
CLK_COR_
CLK_COR_
SEQ_2_3_1[7]
SEQ_2_4_1[1]
CLK_COR_
CLK_COR_
SEQ_2_3_1[6]
SEQ_2_4_1[0]
CLK_COR_
CLK_COR_
SEQ_2_
SEQ_2_3_1[5]
ENABLE_1[4]
CLK_COR_
CLK_COR_
SEQ_2_
SEQ_2_3_1[4]
ENABLE_1[3]
CLK_COR_
CLK_COR_
SEQ_2_
SEQ_2_3_1[3]
ENABLE_1[2]
CLK_COR_
CLK_COR_
SEQ_2_
SEQ_2_3_1[2]
ENABLE_1[1]
CLK_COR_
CLK_COR_
SEQ_2_3_1[1]
SEQ_2_USE_1
CLK_COR_
COM_BURST
SEQ_2_3_1[0]
_VAL_1[3]
CLK_COR_
COM_BURST
SEQ_2_4_1[9]
_VAL_1[2]
CLK_COR_
COM_BURST
SEQ_2_4_1[8]
_VAL_1[1]
CLK_COR_
COM_BURST
SEQ_2_4_1[7]
_VAL_1[0]
COMMA_
CLK_COR_
SEQ_2_4_1[6]
ENABLE_1[9]
COMMA_
CLK_COR_
SEQ_2_4_1[5]
ENABLE_1[8]
COMMA_
CLK_COR_
SEQ_2_4_1[4]
ENABLE_1[7]
COMMA_
CLK_COR_
SEQ_2_4_1[3]
ENABLE_1[6]
COMMA_
CLK_COR_
10B_ENABLE
SEQ_2_4_1[2]
Virtex-5 RocketIO GTP Transceiver User Guide
1D
1E
COMMA_
MCOMMA_
10B_ENABLE
10B_VALUE_
_1[4]
COMMA_
MCOMMA_
10B_ENABLE
10B_VALUE_
_1[3]
COMMA_
MCOMMA_
10B_
10B_VALUE_
ENABLE_1[2]
COMMA_
MCOMMA_
10B_
DETECT_1
ENABLE_1[1]
COMMA_
CHAN_
10B_
BOND_SEQ_
ENABLE_1[0]
2_3_1[9]
CHAN_
COMMA_
BOND_SEQ_
DOUBLE_1
2_2_1[0]
DEC_
CHAN_
MCOMMA_
BOND_SEQ_
DETECT_1
2_2_1[1]
DEC_
CHAN_
PCOMMA_
BOND_SEQ_
DETECT_1
2_2_1[2]
DEC_
CHAN_
VALID_
BOND_SEQ_
COMMA_
2_2_1[3]
ONLY_1
MCOMMA_
CHAN_
10B_VALUE_
BOND_SEQ_
1[9]
2_2_1[4]
MCOMMA_
CHAN_
10B_VALUE_
BOND_SEQ_
1[8]
2_2_1[5]
MCOMMA_
CHAN_
10B_
10B_VALUE_
BOND_SEQ_
1[7]
2_2_1[6]
MCOMMA_
CHAN_
10B_
10B_VALUE_
BOND_SEQ_
1[6]
2_2_1[7]
MCOMMA_
Do Not
10B_
10B_VALUE_
Modify
1[5]
MCOMMA_
CHAN_
10B_
10B_VALUE_
BOND_SEQ_
1[4]
2_2_1[8]
MCOMMA_
CHAN_
10B_VALUE_
BOND_SEQ_
_1[5]
1[3]
2_2_1[9]
UG196 (v1.3) May 25, 2007
R
1F
1[2]
1[1]
1[0]

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