Xilinx Virtex-5 RocketIO GTP User Manual page 47

R
The period of the PLL can be calculated using
The terms used in
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PCI Express Example
To calculate PLL SPEED and SIM_PLL_PERDIV2 for the PCI Express example, the
following values are assigned:
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Using
Equation
hexadecimal.
Gigabit Ethernet Example
To calculate PLL SPEED and SIM_PLL_PERDIV2 for the Gigabit Ethernet example, the
following values are assigned:
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Using
Equation
XAUI Example
To calculate PLL SPEED and SIM_PLL_PERDIV2 for the XAUI example, the following
values are assigned:
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Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
⎛ REFCLK
-------------------------------------- -
PLL SPEED =
⎝
PLL_DIV_REF
SIM_PLL_PERDIV2
Equation 3-2
REFCLK is the speed of the clock tied to the CLKIN input of the GTP_DUAL tile in
MHz.
PLL_DIVSEL_REF is an attribute that defines the dividing factor of the reference clock
divider of the shared PLL.
PLL_DIVSEL_FB is an attribute that defines the dividing factor of the feedback
divider (which acts like a multiplication factor) of the shared PLL.
DIV = 5 when INTDATAWIDTH = 1 (10-bit mode)
DIV = 4 when INTDATAWIDTH = 0 (8-bit mode)
REFCLK = 100 MHz
PLL_DIVSEL_REF = 2
DIV = 5
PLL_DIVSEL_FB = 5
Equation 3-2, PLL SPEED is 1.25 GHz, meaning that the period is 800 ps. Using
3-3, SIM_PLL_PERDIV2 is 800 divided by 2 equal to 400 decimal or 190
REFCLK = 125 MHz
PLL_DIVSEL_REF = 1
DIV = 5
PLL_DIVSEL_FB = 2
Equation 3-2, PLL SPEED is 1.25 GHz, meaning that the period is 800 ps. Using
3-3, SIM_PLL_PERDIV2 is 800 divided by 2 or 400 decimal (190 hexadecimal).
REFCLK = 156.25 MHz
PLL_DIVSEL_REF = 1
DIV = 5
PLL_DIVSEL_FB = 2
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Equation 3-2
⎞
× × (
DIV PLL_DIVSEL_FB
⎠
( ⁄
1 PLL SPEED
= ------------------------------------------ -
2
and Equation 3-3 are defined as follows:
Examples
and Equation 3-3.
)
Equation 3-2
)
Equation 3-3
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