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Transceiver
Virtex-5 RocketIO GTP
User manual
Xilinx Virtex-5 RocketIO GTP User Manual page 287
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Table D-2: DRP Address by Attribute (Continued)
Attribute
CLK_COR_SEQ_2_1_1
CLK_COR_SEQ_2_2_0
CLK_COR_SEQ_2_2_1
CLK_COR_SEQ_2_3_0
CLK_COR_SEQ_2_3_1
CLK_COR_SEQ_2_4_0
CLK_COR_SEQ_2_4_1
CLK_COR_SEQ_2_ENABLE_0
CLK_COR_SEQ_2_ENABLE_1
CLK_COR_SEQ_2_USE_0
CLK_COR_SEQ_2_USE_1
CLK_CORRECT_USE_0
Bit
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