Xilinx Virtex-5 RocketIO GTP User Manual page 3

Date Version
05/25/07 1.3
UG196 (v1.3) May 25, 2007
Chapter 1: Revised line rates in the
description and removed CRC ports in
PCOMMA_DETECT entry and removed CRC_INIT[31:0] attribute in
ports are not part of the GTP_DUAL primitive. See
Chapter 3: Added "Providing Clocks In Simulation," page
design caveats and link to
Chapter 4: Added a note 2 to
Chapter 5: Added to note 5 in
Figure 5-2, page 63. Revised
SFI-5, TFI-5, and the HD-SDI standard in
Figure 5-5, page 71. Added PRBSCNTRESET and PLLPOWERDOWN, and revised
GTPRESET description in
and "Link Idle Reset Support," page
page 81. Added note to Table 5-11, page
Chapter 6: Added a BUFG to
OVERSAMPLE_MODE, and added three attributes to
"Using the TX Phase-Alignment Circuit to Bypass the TX Buffer," page
Figure 6-12, page 107. Added INTDATAWIDTH to
OVERSAMPLE_MODE in
page 113. Added default value to
Chapter 7: Revised Figure 7-2, page
to Table 7-6. Added "Tuning the CDR," page
note 1 to Table 7-29, page 163. Revised CLK_COR_MAX_LAT
Chapter 8: Added clarification to the CRC block description.
Chapter 9: Made changes to
"Far-End PMA Loopback,"
Conditions and Limitations."
Chapter 10: Clarified "REFCLK Guidelines," page
TERMINATION_IMP to Table
Table 10-4, and Table 10-5. Added SelectIO Adjacent to MGTCLK tables at the end of the
chapter. Edited "AC Coupling," page
Network Design Guidelines."
Appendix D: Added PCS_COM_CFG to
4 and 6 in Table D-3.
Appendix E: Added note 2 to
Added Appendix F.
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Revision
"Overview," page
Table 1-3, page
Chapter
Appendix F.
Table 4-1, page 49.
Figure 5-1, page 60. Added PCS_COM_CFG and notes to
Equation 5-1. Changed PLL clock frequency for FC1, FC2,
Table 5-3, page
Table 5-6, page 73. Revised
75. Added note to RXPOWERDOWN in
83.
Figure 6-5. Revised PMA_COM_CFG,
Table 6-12, page
Table 6-14, page 111. Revised TX_DIFF_BOOST in
Table 6-18, page 114.
126. Updated Table
139. Revised
"Near-End PCS Loopback," "Near-End PMA Loopback,"
and "Far-End PCS Loopback,"
Added Table 9-2.
207. Added
10-2. Added note on analog supplies to
210. Added an additional guideline to
Table D-2, Table
Table E-2, page 311.
Virtex-5 RocketIO GTP Transceiver User Guide
19. Added to RXBYTEISALIGNED
24. Corrected
Table 1-4. CRC
8.
44. Added multirate clocking
63. Revised the notes for
"GTP Component-Level Resets"
Table 5-9,
Table 6-8, page 105. Revised the
106. Revised
109. Revised
Table 6-16,
7-3. Added OOB nominal values
Table 7-12, page 141. Added
including adding "Marginal
Figure 10-9. Added
Table 10-3,
"Filter
D-7, and Table D-8. Revised bit