Chapter 11: Design Constraints Overview - Xilinx Virtex-5 RocketIO GTP User Manual

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R
Design Constraints Overview
Figure 11-1
physical link connecting two point-to-point high-speed serial transceivers is defined as a
channel. A channel begins at the die solder bumps of the transmitter and ends at the die
solder bumps of the receiver.
TX
In
and transitions.
Transitions are defined as any section along a multi-gigabit channel where the signal must
go from a transmission line to a three-dimensional structure or vice-versa. Vias,
connectors, and coupling capacitors are examples of these structures.
While a more comprehensive list of transitions is discussed in
Transitions,"
For optimal performance, the following must be minimized in a given channel:
At gigahertz signaling speeds, losses due to the transmission medium become significant
due to greater signal attenuation with increasing frequency. The attenuation of the high-
frequency components slow down the edge and reduce voltage swing, resulting in eye
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
shows a typical physical interconnect topology between two transceivers. Any
BGA Break-Out
TXP
Daughter Card
TXN
Package
Striplines or Microstrips
Figure 11-1: Two Connected Transceivers Forming a Link
Figure
11-1, the channel consists of the FPGA package, transmission lines, connectors,
some common transitions are:
Ball grid array (BGA) to PCB microstrip
Microstrip to stripline vias
DC blocking capacitors
Connectors
Bends and turns in a trace
Signal attenuation due to losses in the transmission medium
Impedance transitions at each transition can lead to reflections, ringing, and other
artifacts in the signal
www.xilinx.com
Connector
Transition
Backplane
Connector Pins
Chapter 11
Other half
mirrored to RX
UG196_c11_01_051406
Chapter 13, "Design of
223

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