Xilinx Virtex-5 RocketIO GTP User Manual page 57

R
XC5VLX110T: GTP_DUAL_X0Y5
XC5VLX220T: GTP_DUAL_X0Y5
XC5VLX330T: GTP_DUAL_X0Y7
XC5VLX110T: GTP_DUAL_X0Y4
XC5VLX220T: GTP_DUAL_X0Y4
XC5VLX330T: GTP_DUAL_X0Y6
XC5VLX110T: GTP_DUAL_X0Y3
XC5VLX220T: GTP_DUAL_X0Y3
XC5VLX330T: GTP_DUAL_X0Y5
XC5VLX110T: GTP_DUAL_X0Y2
XC5VLX220T: GTP_DUAL_X0Y2
XC5VLX330T: GTP_DUAL_X0Y4
Figure 4-6: XC5VLX110T-FF1738, XC5VLX220T-FF1738, and XC5VLX330T-FF1738 GTP Placement (2 of 3)
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Right Edge of the Die
M4
M3
P1
N1
L1
M1
R2
P2
K2
L2
V4
V3
Y1
W1
U1
V1
AA2
Y2
T2
U2
AD4
AD3
AF1
AE1
AC1
AD1
AG2
AF2
AB2
AC2
AK4
AK3
AM1
AL1
AJ1
AK1
AN2
AM2
AH2
AJ2
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Package Placement Information
MGTREFCLKP_116 P3
MGTREFCLKN_116
MGTRXP1_116 N3
MGTRXN1_116 N4
MGTRXP0_116 L3
MGTRXN0_116
MGTTXP1_116 R3
MGTTXN1_116 K3
MGTTXP0_116
MGTTXN0_116
MGTREFCLKP_112 Y3
MGTREFCLKN_112
MGTRXP1_112 W3
MGTRXN1_112 W4
MGTRXP0_112 U3
MGTRXN0_112
MGTTXP1_112 AA3 MGTAVTTTX_112
MGTTXN1_112 T3
MGTTXP0_112
MGTTXN0_112
MGTREFCLKP_114 AF3 MGTAVCCPLL_114
MGTREFCLKN_114
MGTRXP1_114 AE3 MGTAVCC_114
MGTRXN1_114 AE4 MGTAVCC_114
MGTRXP0_114 AC3 MGTAVTTRX_114
MGTRXN0_114
MGTTXP1_114 AB3 MGTAVTTTX_114
MGTTXN1_114 AG3 MGTAVTTTX_114
MGTTXP0_114
MGTTXN0_114
MGTREFCLKP_118 AM3 MGTAVCCPLL_118
MGTREFCLKN_118
MGTRXP1_118 AL3
MGTRXN1_118 AL4
MGTRXP0_118 AJ3
MGTRXN0_118
MGTTXP1_118 AH3 MGTAVTTTX_118
MGTTXN1_118 AN3 MGTAVTTTX_118
MGTTXP0_118
MGTTXN0_118
Power Pins
MGTAVCCPLL_116
MGTAVCC_116
MGTAVCC_116
MGTAVTTRX_116
MGTAVTTTX_116
MGTAVTTTX_116
MGTAVCCPLL_112
MGTAVCC_112
MGTAVCC_112
MGTAVTTRX_112
MGTAVTTTX_112
MGTAVCC_118
MGTAVCC_118
MGTAVTTRX_118
UG196_c4_06_110906
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