Chapter 5: Board Design Guidelines; Overview; Pin Description And Design Guidelines; Gtx Transceiver Pin Descriptions - Xilinx Virtex-6 FPGA User Manual

Board Design Guidelines

Overview

This chapter discusses topics related to implementing a design that uses the Virtex®-6 FPGA
GTX transceiver on a printed circuit board (PCB). The GTX transceivers are analog circuits
that require special consideration and attention when designing and implementing them
on a PCB. For a design to perform optimally, the designer requires an understanding of the
functionality of the device pins and needs to attend to issues such as device interfacing,
transmission line impedance and routing, power supply design filtering and distribution,
component selection, and PCB layout and stackup design.

Pin Description and Design Guidelines

GTX Transceiver Pin Descriptions

Table 5-1
Table 5-1: Quad Pin Descriptions
Pin
MGTAVCC_N
MGTAVCC_S
MGTAVTT_N
MGTAVTT_S
MGTAVTTRCAL
MGTREFCLK0P
MGTREFCLK0N
MGTREFCLK1P
MGTREFCLK1N
MGTRREF
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
defines the pins in a Quad.
Dir
In MGTAVCC is the analog supply for the internal analog circuits of the Quad. This
(Pad) includes the analog circuits for the PLLs, transmitters, and receivers. Most packages
have a north and south bank in the package for MGTAVCC. Refer to the package pin
definitions to identify the power supply bank that is associated with the specific
Quad. The nominal voltage is 1.0 V
In MGTAVTT is the analog supply for the transmitter and receiver termination circuits
(Pad) of the Quad. Most packages have a north and south bank in the package for
MGTAVTT. Refer to the package pin definitions to identify the power supply bank
that is associated with the specific Quad. The nominal voltage is 1.2 V
In Bias current supply for the termination resistor calibration circuit. See
(Pad) Resistor Calibration Circuit, page 274
In Differential clock input pin pair for the reference clock of the Quad.
(Pad)
In Differential clock input pin pair for the reference clock of the Quad.
(Pad)
In Calibration resistor input pin for the termination resistor calibration circuit. See
(Pad) Termination Resistor Calibration Circuit, page 274
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Description
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DC
for more information.
for more information.
Chapter 5
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DC
Termination
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