Capacitor Selection Guidelines; Filter Network Design Guidelines; Special Conditions - Xilinx Virtex-5 RocketIO GTP User Manual

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The ferrites are from the same manufacturer, have the same footprint, and have a nominal
impedance of 220 Ω at 100 MHz. A low DC impedance is required to keep the influence of
the load current change to the supply voltage change on the GTP_DUAL power pin to a
minimum. Some manufacturers offer S parameters, proprietary-free simulation tools, or
third-party simulation tool support via model libraries for their ferrites and capacitors.
These allow the optimization of the filter circuit.
Depending on the spectrum of the noise still on the output pin of the linear regulator, the
ferrite with the optimal characteristics must be selected. High-amplitude spurs in the
frequency range of 1 MHz and above require special attention.

Capacitor Selection Guidelines

The selection criteria for the capacitor are:
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Filter Network Design Guidelines

The selection criteria for the filter network are:
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Special Conditions

The following conditions apply to completely or partially unused GTP_DUAL columns:
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Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Low-inductance capacitor
Dielectric material with a low-temperature coefficient
Dielectric material with a low-frequency coefficient
Place the filter network as close as possible to the device power pin
Ensure a low-inductance connection between the capacitor and the power pin
Simulate the filter circuit and optimize it, if possible
Isolate the analog supply plane between the filter and the FPGA pin. Make sure that
no signals can capacitively or inductively couple into this supply.
Completely unused GTP_DUAL column
There are rare cases when GTP_DUAL tiles in an LXT or SXT device are never going to
be used, meaning the entire GTP_DUAL column is unused. In this case, all differential
pin pairs (MGTRXP/MGTRXN, MGTTXP/MGTTXN, and
MGTREFCLKP/MGTREFCLKN) and the analog supply voltage pins (MGTAVCC,
MGTAVCCPLL, MGTAVTTRX, MGTAVTTTX, and MGTAVTTRXC) should be
grounded.
Partially used GTP_DUAL column
When unused GTP_DUAL tiles of a column are used to forward a clock, the
MGTAVCC and MGTAVCCPLL pins need to be powered using the required filter
circuit as outlined in Figure 10-4, page
need to be powered but filtering is not required. In this case, the differential pin pairs
MGTRXN/MGTRXP and MGTTXN/MGTTXP can be left floating. If the unused
GTP_DUAL tiles are not used for clock forwarding, all analog supplies pins must be
powered but do not require filtering.
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204. The MGTAVTTRX and MGTAVTTTX pins
Providing Power
215