Calibration Clock Output; Tamper And Alarm Output - ST STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Caution:
If a timestamp event occurs immediately after the TSF bit is supposed to be cleared, then
both TSF and TSOVF bits are set. To avoid masking a timestamp event occurring at the
same moment, the application must not write 0 into TSF bit unless it has already read it to 1.
Optionally, a tamper event can cause a timestamp to be recorded. See the description of the
TAMPTS control bit in the RTC control register (RTC_CR).
32.3.16

Calibration clock output

When the COE bit is set to 1 in the RTC_CR register, a reference clock is provided on the
CALIB device output.
If the COSEL bit in the RTC_CR register is reset and PREDIV_A = 0x7F, the CALIB
frequency is f
frequency at 32.768 kHz. The CALIB duty cycle is irregular: there is a light jitter on falling
edges. It is therefore recommended to use rising edges.
When COSEL is set and "PREDIV_S+1" is a non-zero multiple of 256 (i.e: PREDIV_S[7:0] =
0xFF), the CALIB frequency is f
calibration output at 1 Hz for prescaler default values (PREDIV_A = Ox7F, PREDIV_S =
0xFF), with an RTCCLK frequency at 32.768 kHz.
Note:
When the CALIB output is selected, the RTC_OUT1 pin is automatically configured but the
RTC_OUT2 pin must be set as alternate function.
When COSEL is cleared, the CALIB output is the output of the 6
asynchronous prescaler. If LPCAL is changed from 0 to 1, the output can be irregular
(glitch...) during the LPCAL switch. If LPCAL = 1 this output is always available. If LPCAL =
0, no output is present if PREDIV_A is < 0x20.
When COSEL is set, the CALIB output is the output of the 8
prescaler.
32.3.17

Tamper and alarm output

The OSEL[1:0] control bits in the RTC_CR register are used to activate the alarm output
TAMPALRM, and to select the function which is output. These functions reflect the contents
of the corresponding flags in the RTC_SR register.
When the TAMPOE control bit is set is the RTC_CR, all external and internal tamper flags
are ORed and routed to the TAMPALRM output. If OSEL = 00 the TAMPALRM output
reflects only the tampers flags. If OSEL ≠ 00, the signal on TAMPALRM provides both
tamper flags and alarm A, B, or wakeup flag.
The polarity of the TAMPALRM output is determined by the POL control bit in RTC_CR so
that the opposite of the selected flags bit is output when POL is set to 1.
TAMPALRM output
The TAMPALRM pin can be configured in output open drain or output push-pull using the
control bit TAMPALRM_TYPE in the RTC_CR register. It is possible to apply the internal
pull-up in output mode thanks to TAMPALRM_PU in the RTC_CR.
Note:
Once the TAMPALRM output is enabled, it has priority over CALIB on RTC_OUT1.
When the TAMPALRM output is selected, the RTC_OUT1 pin is automatically configured
but the RTC_OUT2 pin must be set as alternate function. In case the TAMPALRM is
configured open-drain in the RTC, the RTC_OUT1 GPIO must be configured as input.
. This corresponds to a calibration output at 512 Hz for an RTCCLK
/64
RTCCLK
RTCCLK
RM0453 Rev 1
/(256 * (PREDIV_A+1)). This corresponds to a
th
Real-time clock (RTC)
th
stage of the
stage of the synchronous
1015/1461
1057

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