Tpiu Asynchronous Clock Prescaler Register (Tpiu_Acpr); Tpiu Selected Pin Protocol Register (Tpiu_Sppr) - ST STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
38.11.3

TPIU asynchronous clock prescaler register (TPIU_ACPR)

Address offset: 0x010
Reset value: 0x0000 0000
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Res.
Res.
Res.
rw
Bits 31:13 Reserved, must be kept at reset value.
Bits 12:0 PRESCALER[12:0]: selects the baud rate for the asynchronous output, TRACESWO
The baud rate is given by the TRACELKIN frequency divided by (PRESCALER +1).
38.11.4

TPIU selected pin protocol register (TPIU_SPPR)

Address offset: 0x0F0
Reset value: 0x0000 0001
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Res.
Res.
Res.
Res.
Bits 31:2 Reserved, must be kept at reset value.
Bits 1:0 TXMODE[1:0]: selects the protocol used for trace output
0x0: reserved (parallel trace port mode not supported in this device)
0x1: Asynchronous SWO using Manchester encoding
0x2: Asynchronous SWO using NRZ encoding
0x3: reserved
27
26
25
24
Res.
Res.
Res.
Res.
11
10
9
8
rw
rw
rw
rw
27
26
25
24
Res.
Res.
Res.
Res.
11
10
9
8
Res.
Res.
Res.
Res.
RM0453 Rev 1
23
22
21
20
Res.
Res.
Res.
Res.
7
6
5
4
PRESCALER[12:0]
rw
rw
rw
rw
23
22
21
20
Res.
Res.
Res.
Res.
7
6
5
4
Res.
Res.
Res.
Res.
Debug support (DBG)
19
18
17
16
Res.
Res.
Res.
Res.
3
2
1
0
rw
rw
rw
rw
19
18
17
16
Res.
Res.
Res.
Res.
3
2
1
0
Res.
Res.
TXMODE[1:0]
rw
rw
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