Low-power universal asynchronous receiver transmitter (LPUART)
36.3
LPUART implementation
Below the description of LPUART implementation in comparison with USART.
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode (Master/Slave)
Smartcard mode
Single-wire Half-duplex communication
IrDA SIR ENDEC block
LIN mode
Dual clock domain and wakeup from low-power mode
Receiver timeout interrupt
Modbus communication
Auto baud rate detection
Driver Enable
USART data length
Tx/Rx FIFO
Tx/Rx FIFO size
Wakeup from Stop mode
1. X = supported.
2. Wakeup supported from Stop 0 and Stop 1 modes.
3. Wakeup supported from Stop 0, Stop 1 and Stop 2 modes.
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Table 247. USART / LPUART features
USART /LPUART modes/features
(1)
RM0453 Rev 1
USART1/2
LPUART1
X
X
X
X
X
X
X
X
X
X
X
X
X
7, 8 and 9 bits
X
8
(2)
X
X
RM0453
X
X
X
-
-
X
-
-
X
-
-
-
X
X
(3)
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