Tim17 Input Selection Register (Tim17_Tisel) - ST STM32WL5 Series Reference Manual

General-purpose timers (TIM16/TIM17)
Bit 9 BKINP: BRK BKIN input polarity
This bit selects the BKIN alternate function input sensitivity. It must be programmed together
with the BKP polarity bit.
0: BKIN input is active low
1: BKIN input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
Bits 8:3 Reserved, must be kept at reset value.
Bit 2 BKCMP2E: BRK COMP2 enable
This bit enables the COMP2 for the timer's BRK input. COMP2 output is 'ORed' with the
other BRK sources.
0: COMP2 input disabled
1: COMP2 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
Bit 1 BKCMP1E: BRK COMP1 enable
This bit enables the COMP1 for the timer's BRK input. COMP1 output is 'ORed' with the
other BRK sources.
0: COMP1 input disabled
1: COMP1 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
Bit 0 BKINE: BRK BKIN input enable
This bit enables the BKIN alternate function input for the timer's BRK input. BKIN input is
'ORed' with the other BRK sources.
0: BKIN input disabled
1: BKIN input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
27.4.22

TIM17 input selection register (TIM17_TISEL)

Address offset: 0x68
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
Bits 31:4 Reserved, must be kept at reset value.
Bits 3:0 TI1SEL[3:0]: selects TI1[0] to TI1[15] input
0000: TIM17_CH1 input
Others: Reserved
950/1461
in TIMx_BDTR register).
in TIMx_BDTR register).
in TIMx_BDTR register).
in TIMx_BDTR register).
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
24 23 22
Res. Res. Res.
8 7 6
Res. Res. Res.
RM0453 Rev 1
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
Res. Res. TI1SEL[3:0]
rw rw
RM0453
17 16
Res. Res.
1 0
rw rw