ST STM32WL5 Series Reference Manual page 1362

Debug support (DBG)
Table 271. DWT register map and reset values (continued)
Offset Register name
DWT_CPICNTR
0x008
Reset value
DWT_EXCCNTR
0x00C
Reset value
DWT_SLPCNTR
0x010
Reset value
DWT_LSUCNTR
0x014
Reset value
DWT_FOLDCNTR
0x018
Reset value
DWT_PCSR
0x01C
Reset value
DWT_COMP0R
0x020
Reset value
DWT_MASK0R
0x024
Reset value
DWT_FUNCT0R
0x028
Reset value
0x02C Reserved
DWT_COMP1R
0x030
Reset value
DWT_MASK1R
0x034
Reset value
DWT_FUNCT1R
0x038
Reset value
0x03C Reserved
DWT_COMP2R
0x040
Reset value
DWT_MASK2R
0x044
Reset value
DWT_FUNCT2R
0x048
Reset value
0x04C Reserved
1362/1461
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0 0
0
EIASAMPLE[31:0]
0 0 0 0 0 0 0 0 0
COMP[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
Reserved.
COMP[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
Reserved.
COMP[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
Reserved.
RM0453 Rev 1
CPICNT[7:0]
0 0 0
EXCCNT[7:0]
0 0 0
SLEEPCNT[7:0]
0 0 0
LSUCNT[7:0]
0 0 0
FOLDCNT[7:0]
0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
RM0453
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
MASK[4:0]
0 0 0 0 0
0 0 0 0
0 0 0 0 0
MASK[4:0]
0 0 0 0 0
0 0 0 0
0 0 0 0 0
MASK[4:0]
0 0 0 0 0
0 0 0 0