Figure 148. Update Rate Examples Depending On Mode And Timx_Rcr Register Settings - ST STM32WL5 Series Reference Manual

Advanced-control timer (TIM1)
In Center aligned mode, for odd values of RCR, the update event occurs either on the
overflow or on the underflow depending on when the RCR register was written and when
the counter was launched: if the RCR was written before launching the counter, the UEV
occurs on the underflow. If the RCR was written after launching the counter, the UEV occurs
on the overflow.
For example, for RCR = 3, the UEV is generated each 4th overflow or underflow event
depending on when the RCR was written.

Figure 148. Update rate examples depending on mode and TIMx_RCR register settings

Counter
TIMx_CNT
TIMx_RCR = 0
UEV
TIMx_RCR = 1
UEV
TIMx_RCR = 2
TIMx_RCR = 3
TIMx_RCR = 3
and
re-synchronization
UEV
Update event: Preload registers transferred to active registers and update interrupt generated
Update Event if the repetition counter underflow occurs when the counter is equal to the auto-reload value.
746/1461
Counter-aligned mode
UEV
UEV
UEV
(by SW)
Upcounting
(by SW)
RM0453 Rev 1
Edge-aligned mode
Downcounting
(by SW)
RM0453
MSv31195V1