Lpuart Baud Rate Generation; Table 248. Error Calculation For Programmed Baud Rates At Lpuart_Ker_Ck_Pres = 32,768 Khz - ST STM32WL5 Series Reference Manual

RM0453
multibuffer communication, an interrupt is issued if the EIE bit is set in the
LPUART_CR3 register.
The FE bit is reset by writing 1 to the FECF in the LPUART_ICR register.
Configurable stop bits during reception
The number of stop bits to be received can be configured through the control bits of
LPUART_CR2: it can be either 1 or 2 in normal mode.
•
1 stop bit: sampling for 1 stop bit is done on the 8th, 9th and 10th samples.
• 2 stop bits: sampling for the 2 stop bits is done in the middle of the second stop bit.
The RXNE and FE flags are set just after this sample i.e. during the second stop bit.
The first stop bit is not checked for framing error.
36.4.7

LPUART baud rate generation

The baud rate for the receiver and transmitter (Rx and Tx) are both set to the value
programmed in the LPUART_BRR register.
LPUARTDIV is defined in the LPUART_BRR register.
Note: The baud counters are updated to the new value in the baud registers after a write operation
to LPUART_BRR. Hence the baud rate register value should not be changed during
communication.
It is forbidden to write values lower than 0x300 in the LPUART_BRR register.
f must range from 3 x baud rate to 4096 x baud rate.
CK
The maximum baud rate that can be reached when the LPUART clock source is the LSE, is
9600 baud. Higher baud rates can be reached when the LPUART is clocked by clock
sources different from the LSE clock. For example, if the LPUART clock source frequency is
100 MHz, the maximum baud rate that can be reached is about 33 Mbaud.

Table 248. Error calculation for programmed baud rates at lpuart_ker_ck_pres = 32,768 KHz

Baud rate
S.No Desired
1 0.3 KBps
2 0.6 KBps
3 1200 Bps
4 2400 Bps
5 4800 Bps
6 9600 KBps
Low-power universal asynchronous receiver transmitter (LPUART)
Tx/Rx baud
Value programmed in the baud
Actual
0.3 KBps
0.6 KBps
1200.087 Bps
2400.17 Bps
4801.72 Bps
9608.94 Bps
×
256 lpuart
= ----------------------------------------------------
LPUARTDIV
= 32,768 KHz
lpuart_ker_ck_pres
rate register
0x6D3A
0x369D
0x1B4E
0xDA7
0x6D3
0x369
RM0453 Rev 1
ckpres
% Error = (Calculated - Desired)
B.rate / Desired B.rate
0
0
0.007
0.007
0.035
0.093
1227/1461
1266