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RM0453
CTI CoreSight component identity register 2 (CTI_CIDR2)
Address offset: 0xFF8
Reset value: 0x0000 0005
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Res.
Res.
Res.
Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 PREAMBLE[19:12]: component ID bits [23:16]
0x05: Common ID value
CTI CoreSight component identity register 3 (CTI_CIDR3)
Address offset: 0xFFC
Reset value: 0x0000 00B1
r
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Res.
Res.
Res.
Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 PREAMBLE[27:20]: component ID bits [31:24]
0xB1: Common ID value
CTI register map and reset values
Offset Register name
CTI_CONTROLR
0x000
Reset value
CTI_INTACKR
0x010
Reset value
CTI_APPSETR
0x014
Reset value
27
26
25
24
Res.
Res.
Res.
Res.
11
10
9
8
Res.
Res.
Res.
Res.
27
26
25
24
Res.
Res.
Res.
Res.
11
10
9
8
Res.
Res.
Res.
Res.
Table 276. CTI register map and reset values
RM0453 Rev 1
23
22
21
20
Res.
Res.
Res.
Res.
7
6
5
4
PREAMBLE[19:12]
r
r
r
r
23
22
21
20
Res.
Res.
Res.
Res.
7
6
5
4
PREAMBLE[27:20]
r
r
r
r
Debug support (DBG)
19
18
17
16
Res.
Res.
Res.
Res.
3
2
1
0
r
r
r
r
19
18
17
16
Res.
Res.
Res.
Res.
3
2
1
0
r
r
r
r
INTACK[7:0]
0
0
0
0
0
0
0 0
APPSET[3:0]
0
0
0 0
1381/1461
0
1448
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