ST STM32WL5 Series Reference Manual page 578

Advanced arm-based 32-bit mcus with sub-ghz radio solution

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Analog-to-digital converter (ADC)

Bits 8:6 EXTSEL[2:0]: External trigger selection

These bits select the external event used to trigger the start of conversion (refer to

External triggers

Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this

Bit 5 ALIGN: Data alignment

This bit is set and cleared by software to select right or left alignment. Refer to

Data alignment and resolution (oversampling disabled: OVSE = 0) on page 552

0: Right alignment

1: Left alignment

Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this

Bits 4:3 RES[1:0]: Data resolution

These bits are written by software to select the resolution of the conversion.

Note: The software is allowed to write these bits only when ADEN = 0.

for details):

ensures that no conversion is ongoing).

RM0453 Rev 1

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