Crc Control Register (Crc_Cr) - ST STM32WL5 Series Reference Manual

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CRC control register (CRC_CR)

Address offset: 0x08

Reset value: 0x0000 0000

Bits 31:8 Reserved, must be kept at reset value.

Bit 7 REV_OUT: Reverse output data

This bit controls the reversal of the bit order of the output data.

0: Bit order not affected

1: Bit-reversed output format

Bits 6:5 REV_IN[1:0]: Reverse input data

These bits control the reversal of the bit order of the input data

00: Bit order not affected

01: Bit reversal done by byte

10: Bit reversal done by half-word

11: Bit reversal done by word

Bits 4:3 POLYSIZE[1:0]: Polynomial size

These bits control the size of the polynomial.

00: 32 bit polynomial

01: 16 bit polynomial

10: 8 bit polynomial

11: 7 bit polynomial

Bits 2:1 Reserved, must be kept at reset value.

Bit 0 RESET: RESET bit

This bit is set by software to reset the CRC calculation unit and set the data register to the

value stored in the CRC_INIT register. This bit can only be set, it is automatically cleared by

Cyclic redundancy check calculation unit (CRC)

RM0453 Rev 1

POLYSIZE[1:0]

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