Figure 281. Slave Initialization Flowchart - ST STM32WL5 Series Reference Manual

Inter-integrated circuit (I2C) interface
Slave byte control mode
In order to allow byte ACK control in slave reception mode, The Slave byte control mode
must be enabled by setting the SBC bit in the I2C_CR1 register. This is required to be
compliant with SMBus standards.
The Reload mode must be selected in order to allow byte ACK control in slave reception
mode (RELOAD=1). To get control of each byte, NBYTES must be initialized to 0x1 in the
ADDR interrupt subroutine, and reloaded to 0x1 after each received byte. When the byte is
received, the TCR bit is set, stretching the SCL signal low between the 8th and 9th SCL
pulses. The user can read the data from the I2C_RXDR register, and then decide to
acknowledge it or not by configuring the ACK bit in the I2C_CR2 register. The SCL stretch is
released by programming NBYTES to a non-zero value: the acknowledge or not-
acknowledge is sent and next byte can be received.
NBYTES can be loaded with a value greater than 0x1, and in this case, the reception flow is
continuous during NBYTES data reception.
Note: The SBC bit must be configured when the I2C is disabled, or when the slave is not
addressed, or when ADDR=1.
The RELOAD bit value can be changed when ADDR=1, or when TCR=1.
Caution: The Slave byte control mode is not compatible with NOSTRETCH mode. Setting SBC when
NOSTRETCH=1 is not allowed.
1072/1461

Figure 281. Slave initialization flowchart

Slave
initialization
Initial settings
Clear {OA1EN, OA2EN} in I2C_OAR1 and I2C_OAR2
Configure {OA1[9:0], OA1MODE, OA1EN,
OA2[6:0], OA2MSK[2:0], OA2EN, GCEN}
Configure SBC in I2C_CR1*
Enable interrupts and/or
DMA in I2C_CR1
End
RM0453 Rev 1
*SBC must be set to support SMBus features
RM0453
MS19850V2