Figure 295. Transfer Sequence Flowchart For I2C Master Receiver For N≤255 Bytes - ST STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Inter-integrated circuit (I2C) interface
RM0453
Figure 295. Transfer sequence flowchart for I2C master receiver for N≤255 bytes
Master reception
Master initialization
NBYTES = N
AUTOEND = 0 for RESTART; 1 for STOP
Configure slave address
Set I2C_CR2.START
No
I2C_ISR.RXNE
=1?
Yes
Read I2C_RXDR
No
NBYTES
received?
Yes
Yes
I2C_ISR.TC =
1?
Set I2C_CR2.START with
No
slave addess NBYTES ...
End
MS19863V2
1088/1461
RM0453 Rev 1

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