Standard Multi-Slave Communication; Figure 349. Simplex Single Master/Single Slave Application - ST STM32WL5 Series Reference Manual

Serial peripheral interface / integrated interchip sound (SPI/I2S)
Figure 349. Simplex single master/single slave application (master in transmit-only/
1. The NSS pins can be used to provide a hardware control flow between master and slave. Optionally, the
pins can be left unused by the peripheral. Then the flow has to be handled internally for both master and
slave. For more details see
2. An accidental input information is captured at the input of transmitter Rx shift register. All the events
associated with the transmitter receive flow must be ignored in standard transmit only mode (e.g. OVF
flag).
3. In this configuration, both the MISO pins can be used as GPIOs.
Note: Any simplex communication can be alternatively replaced by a variant of the half-duplex
communication with a constant setting of the transaction direction (bidirectional mode is
enabled while BDIO bit is not changed).
37.5.3

Standard multi-slave communication

In a configuration with two or more independent slaves, the master uses GPIO pins to
manage the chip select lines for each slave (see
of the slaves individually by pulling low the GPIO connected to the slave NSS input. When
this is done, a standard master and dedicated slave communication is established.
1272/1461
(2)
Rx shift register
Tx shift register
SPI clock
generator
Master
Section 37.5.5: Slave select (NSS) pin
slave in receive-only mode)
MISO
MOSI
SCK
(1)
NSS
Figure
RM0453 Rev 1
MISO
Tx shift register
MOSI
Rx shift register
SCK
(1)
NSS
Slave
management.
350.). The master must select one
RM0453
MSv39625V1