Figure 297. Transfer Bus Diagrams For I2C Master Receiver - ST STM32WL5 Series Reference Manual

Inter-integrated circuit (I2C) interface
Example I2C master receiver 2 bytes, automatic end mode (STOP)
NBYTES
INIT: program Slave address, program NBYTES = 2, AUTOEND=1, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
Example I2C master receiver 2 bytes, software end mode (RESTART)
INIT
NBYTES
xx
INIT: program Slave address, program NBYTES = 2, AUTOEND=0, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: read data2
EV3: TC ISR: program Slave address, program NBYTES = N, set START
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Figure 297. Transfer bus diagrams for I2C master receiver

S Address A data1
INIT
xx 2
RXNE
S Address A data1
A
EV1
2
RXNE RXNE
data2 NA P
A
EV1 EV2
RXNE TC
data2 NA ReS Address
EV2
N
RM0453 Rev 1
RM0453
legend:
transmission
reception
SCL stretch
legend:
transmission
reception
SCL stretch
MS19865V1