Aes Hardware Accelerator (Aes); Introduction; Aes Main Features - ST STM32WL5 Series Reference Manual

AES hardware accelerator (AES)

23 AES hardware accelerator (AES)
23.1

Introduction

The AES hardware accelerator (AES) encrypts or decrypts data, using an algorithm and
implementation fully compliant with the advanced encryption standard (AES) defined in
Federal information processing standards (FIPS) publication 197.
The peripheral supports CTR, GCM, GMAC, CCM, ECB, and CBC chaining modes for key
sizes of 128 or 256 bits.
AES is an AMBA AHB slave peripheral accessible through 32-bit single accesses only.
Other access types generate an AHB error, and other than 32-bit writes may corrupt the
register content.
The peripheral supports DMA single transfers for incoming and outgoing data (two DMA
channels required).
23.2

AES main features

•
Compliance with NIST "Advanced encryption standard (AES), FIPS publication 197"
from November 2001
• 128-bit data block processing
•
Support for cipher key lengths of 128-bit and 256-bit
• Encryption and decryption with multiple chaining modes:
–
–
–
–
–
–
•
51 or 75 clock cycle latency in ECB mode for processing one 128-bit block of data with,
respectively, 128-bit or 256-bit key
• Integrated round key scheduler to compute the last round key for ECB/CBC decryption
•
AMBA AHB slave peripheral, accessible through 32-bit word single accesses only
• 256-bit write-only register for storing the cryptographic key (eight 32-bit registers)
•
128-bit register for storing initialization vector (four 32-bit registers)
• 32-bit buffer for data input and output
•
Automatic data flow control with support of single-transfer direct memory access (DMA)
using two channels (one for incoming data, one for processed data)
•
Data-swapping logic to support 1-, 8-, 16- or 32-bit data
•
Possibility for software to suspend a message if AES needs to process another
message with a higher priority, then resume the original message
650/1461
Electronic codebook (ECB) mode
Cipher block chaining (CBC) mode
Counter (CTR) mode
Galois counter mode (GCM)
Galois message authentication code (GMAC) mode
Counter with CBC-MAC (CCM) mode
RM0453 Rev 1
RM0453