Low-power timer (LPTIM)
18.4.15
Debug mode
When the microcontroller enters debug mode (core halted), the LPTIM counter either
continues to work normally or stops, depending on the DBG_LPTIM_STOP configuration bit
in the DBGMCU module.
18.5
LPTIM low-power modes
Sleep
Stop
Standby
460/771
Figure 172. Encoder mode counting sequence
Table 75. Effect of low-power modes on the LPTIM
Mode
No effect. LPTIM interrupts cause the device to exit Sleep mode.
The LPTIM peripheral is active when it is clocked by LSE or LSI. LPTIM
interrupts cause the device to exit Stop mode
The LPTIM peripheral is powered down and must be reinitialized after
exiting Standby mode.
Description
RM0401 Rev 3
RM0401
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