Figure 308. Tc/Txe Behavior When Transmitting - ST STM32WL5 Series Reference Manual

RM0453
Single byte communication
•
When FIFO mode is disabled
Writing to the transmit data register always clears the TXE bit. The TXE flag is set by
hardware. It indicates that:
–
–
–
This flag generates an interrupt if the TXEIE bit is set.
When a transmission is ongoing, a write instruction to the USART_TDR register stores
the data in the TDR buffer. It is then copied in the shift register at the end of the current
transmission.
When no transmission is ongoing, a write instruction to the USART_TDR register
places the data in the shift register, the data transmission starts, and the TXE bit is set.
•
When FIFO mode is enabled, the TXFNF (TXFIFO not full) flag is set by hardware to
indicate that:
–
–
–
When the TXFIFO is not full, the TXFNF flag stays at '1' even after a write operation to
USART_TDR register. It is cleared when the TXFIFO is full. This flag generates an
interrupt if the TXFNFIE bit is set.
Alternatively, interrupts can be generated and data can be written to the FIFO when the
TXFIFO threshold is reached. In this case, the CPU can write a block of data defined by
the programmed trigger level.
If a frame is transmitted (after the stop bit) and the TXE flag (TXFE in case of FIFO
mode) is set, the TC flag goes high. An interrupt is generated if the TCIE bit is set in the
USART_CR1 register.
After writing the last data to the USART_TDR register, it is mandatory to wait until TC is set
before disabling the USART or causing the device to enter the low-power mode (see
Figure 308: TC/TXE behavior when
Universal synchronous/asynchronous receiver transmitter (USART/UART)
the data have been moved from the USART_TDR register to the shift register and
the data transmission has started;
the USART_TDR register is empty;
the next data can be written to the USART_TDR register without overwriting the
previous data.
the TXFIFO is not full;
the USART_TDR register is empty;
the next data can be written to the USART_TDR register without overwriting the
previous data. When a transmission is ongoing, a write operation to the
USART_TDR register stores the data in the TXFIFO. Data are copied from the
TXFIFO to the shift register at the end of the current transmission.
transmitting).
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