ST STM32WL5 Series Reference Manual page 1383

RM0453
Offset Register name
CTI_OUTENR6
0x0B8
Reset value
CTI_OUTENR7
0x0BC
Reset value
0x0C0 to
Reserved
0x12C
CTI_TRIGISTSR
0x130
Reset value
CTI_TRIGOSTSR
0x134
Reset value
CTI_CHINSTSR
0x138
Reset value
CTI_CHOUTSTSR
0x13C
Reset value
CTI_GATER
0x140
Reset value
0x144 to
Reserved
0xF8C
CTI_CLAIMSETR
0xFA0
Reset value
CTI_CLAIMCLR
0xFA4
Reset value
0xFA8to
Reserved
0xFAC
CTI_LAR
0xFB0
Reset value
CTI_LSR
0xFB4
Reset value
CTI_AUTHSTATR
0xFB8
Reset value
0xFC0to
Reserved
0xFC4
CTI_DEVIDR
0xFC8
Reset value
CTI_DEVTYPER
0xFCC
Reset value
Table 276. CTI register map and reset values (continued)
0 0 0 0 0 0 0 0
Reserved
Reserved
Reserved
ACCESS_W[31:0]
0 0 0 0 0 0 0 0 0
Reserved
NUMCH[3:0]
0 1 0 0 0
RM0453 Rev 1
Debug support (DBG)
TRIGINSTATUS[7:0]
0 0
TRIGOUTSTATUS[7:0]
0 0
0 0 0 0 0 0 0 0 0
0 0
NUMTRIG[7:0]
0 0 0 1 0 0 0
SUBTYPE
[3:0]
0 0
TRIGOUTEN
[3:0]
0 0 0 0
TRIGOUTEN
[3:0]
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
CHIN
STATUS[3:0]
0 0 0 0
CHOUT
STATUS[3:0]
0 0 0 0
GATEEN[3:0]
1 1 1 1
CLAIMSET
[3:0]
1 1 1 1
CLAIMCLR
[3:0]
0 0 0 0
0 0 0 0 0 0
0 1 1
0 0 0 1 0 1
EXTMUXNUM
[4:0]
0 0 0 0 0
MAJORTYPE
[3:0]
0 1 0 1 0 0
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