Dmamux Signals; Dmamux Channels; Table 86. Dmamux Signals - ST STM32WL5 Series Reference Manual

RM0453
14.4.2

DMAMUX signals

Table 86
Signal name
dmamux_hclk
dmamux_req_inx
dmamux_trgx
dmamux_req_genx
dmamux_reqx
dmamux_syncx
dmamux_req_outx
dma_secmx
dma_privx
dmamux_evtx
dmamux_non_sec_ovr_it
dmamux_sec_ovr_it
dmamux_illegal_access_it DMAMUX security illegal access output (to secure interrupt controller)
14.4.3

DMAMUX channels

A DMAMUX channel is a DMAMUX request multiplexer channel that may include,
depending on the selected input of the request multiplexer, an additional DMAMUX request
generator channel.
A DMAMUX request multiplexer channel is connected and dedicated to one single channel
of DMA controller(s).
Channel configuration procedure
Follow the sequence below to configure both a DMAMUX x channel and the related DMA
channel y:
1. Set to secure or non-secure the DMA channel y by a secure write access to the secure
control bit of the DMA channel y configuration register, and set to privileged or
unprivileged the DMA channel y by a privileged write access to the privileged control bit
of the DMA channel y configuration register.
2. Set and configure completely the DMA channel y, except enabling the channel y.
3. Set and configure completely the related DMAMUX y channel.
4. Last, activate the DMA channel y by setting the EN bit in the DMA y channel register.
1. Set and configure completely the DMA channel y, except enabling the channel y.
2. Set and configure completely the related DMAMUX y channel.
3. Last, activate the DMA channel y by setting the EN bit in the DMA y channel register.
lists the DMAMUX signals.
DMAMUX AHB clock
DMAMUX DMA request line inputs from peripherals
DMAMUX DMA request triggers inputs (to request generator sub-block)
DMAMUX request generator sub-block channels outputs
DMAMUX request multiplexer sub-block inputs (from peripheral
requests and request generator channels)
DMAMUX synchronization inputs (to request multiplexer sub-block)
DMAMUX requests outputs (to DMA controllers)
Secure mode of each DMA controller request channel
Privileged mode of each DMA controller request channel
DMAMUX events outputs
DMAMUX non-secure overrun interrupts
DMAMUX secure overrun interrupts

Table 86. DMAMUX signals

RM0453 Rev 1
DMA request multiplexer (DMAMUX)
Description
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