Adc Functional Description; Adc Pins And Internal Signals; Table 100. Adc Input/Output Pins; Figure 58. Adc Block Diagram - ST STM32WL5 Series Reference Manual

Analog-to-digital converter (ADC)
18.3

ADC functional description

Figure 58
SCANDIR
up/down
CH_SEL[17:0]
single/cont.
V
BAT
V
REFINT
V
dac_out1
ADC_IN[11:0]
Auto-delayed
conversion
stop conversion
TIM1_TRGO2
TIM1_CC4
TIM2_TRGO
TIM2_CH4
TIM2_CH3
EXTI[11]
18.3.1

ADC pins and internal signals

Name
VDDA
VSSA
VREF+
ADC_INx
534/1461
shows the ADC block diagram and

Figure 58. ADC block diagram

Analog supply
1.62 to 3.6 V
AUTOFF
Auto-off mode
ADEN/ADDIS
CONT
LFTRIG
/3
ADCAL self
Input calibration
selection
TS
& scan
SMP[2:0]
control
sampling
V
IN[x]
time
Start & stop
control
AUTDLY
ADSTART
SW trigger
ADSTP
HW
trigger
EXTEND[1:0]
Trigger enable
and edge
selection
EXTSEL[2:0]
Trigger selection

Table 100. ADC input/output pins

Signal type
Input, analog power
supply
Input, analog supply
ground
Input, analog reference
positive
Analog input signals
Table 100
VREF+
DATA[15:0]
Supply &
reference
SAR ADC
V
IN
CONVERTED
Overs
start
DATA
ampler
OVRMODE
(overrun mode)
ALIGN (left/right)
RES[1:0]
(12, 10, 8 bits)
JOFFSETx[11:0]
TOVS
JOFFSETx_
CH[11:0]
OVSS[3:0]
OVSR[3:0]
OVSE
DISCEN
Discontinuous
mode
Analog power supply and positive reference voltage
for the ADC, V
Ground for analog power supply. Must be at V
potential
The higher/positive reference voltage for the ADC.
12 external analog input channels
RM0453 Rev 1
gives the ADC pin description.
AREADY
EOSMP
ADC interrupt IRQ
EOSEQ
EOC
OVR
Master
AWD
AHB
to slave
APB
APB
Master
interface
DMA request
DMAEN
DMACFG
ADC_AWDx_OUT
To analog watchdog
AWDxEN
AWDxSGL
AWDCHx[4:0]
LTx[11:0]
HTx[11:0]
Remarks
≥ V
DDA DD
RM0453
CPU
DMA
MSv61353V2
SS