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RM0453
35.8.14
USART prescaler register (USART_PRESC)
This register can only be written when the USART is disabled (UE = 0).
Address offset: 0x2C
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:4 Reserved, must be kept at reset value.
Bits 3:0 PRESCALER[3:0]: Clock prescaler
The USART input clock can be divided by a prescaler factor:
Note: When PRESCALER is programmed with a value different of the allowed ones,
Universal synchronous/asynchronous receiver transmitter (USART/UART)
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
0000: input clock not divided
0001: input clock divided by 2
0010: input clock divided by 4
0011: input clock divided by 6
0100: input clock divided by 8
0101: input clock divided by 10
0110: input clock divided by 12
0111: input clock divided by 16
1000: input clock divided by 32
1001: input clock divided by 64
1010: input clock divided by 128
1011: input clock divided by 256
Remaining combinations: Reserved
programmed prescaler value is 1011 i.e. input clock divided by 256.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
RM0453 Rev 1
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
PRESCALER[3:0]
rw
rw
17
16
Res.
Res.
1
0
rw
rw
1211/1461
1266
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