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3.2 Reset
The detail of reset operation and reset sources are described below.
3.2.1 Reset Operation
When reset conditions occur, the MB89950 series of microcontrollers suspend the currently-executing
instruction to enter the reset state. The contents written at the RAM do not change before and after reset.
However, if a reset occurs during writing of 16-bit long data, data is written to the upper bytes and may not
be written to lower bytes. If a reset occurs around write timing, the contents of the addresses being written
are not assured.
When the reset conditions are cleared, the MB89950 series of microcontrollers are released from the reset
state and start operation after fetching the mode data from address FFFD
vectors from address FFFE
flowchart for the reset operation.
Fig. 3.3 indicates the structure of data to be stored in addresses FFFD
FFFF
Lower 8 bits of reset vector
H
FFFE
Upper 8 bits of reset vector
H
FFFD
H
OPERATION
, and the lower bytes from address FFFF
H
Fetches mode data from address FFFD
Fetches reset vectors from addresses
and FFFF
FFFE
H
Fetches instruction codes from reset
vectors and executes the instruction
Executes the next instruction
Fig. 3.2 Outline of Reset Operation
Enter the address where the instruction, which will be executed first
after reset is cleared, is stored.
7
Reserved; always set 0.
Fig. 3.3 Reset Vector Structure
, the upper bytes of the reset
H
, in that order. Fig. 3.2 shows the
H
Reset clear
H
H
, FFFE
H
6
5
4
3
2
3– 4
, and FFFF
.
H
H
1
0
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