Port Function; Definition Of Clock And Cycle; Table Selection Of System Clock - Renesas 4513 User Manual

PORT FUNCTION

Port Pin
Port D D –D
0 5
D /CNTR0
6
D /CNTR1
7
Port P0 P0 –P0
0 3
Port P1 P1 –P1
0 3
Port P2 P2 /S
0 CK
P2 /S
1 OUT
P2 /S
2 IN
Port P3 P3 /INT0
0
(Note 1) P3 /INT1
1
P3 , P3
2 3
Port P4 P4 /A
0 IN4
(Note 2) –P4 /A
3 IN7
Port P5 P5 –P5
0 3
(Note 2)
Notes 1: The 4513 Group does not have P3
2: The 4513 Group does not have these ports.

DEFINITION OF CLOCK AND CYCLE

System clock
The system clock is the basic clock for controlling this product.
The system clock is selected by the bit 3 of the clock control reg-
ister MR.

Table Selection of system clock

Register MR
MR
3
0
1
Note: f(X )/2 is selected after system is released from reset.
IN
Instruction clock
The instruction clock is a signal derived by dividing the system
clock by 3. The one instruction clock cycle generates the one
machine cycle.
Machine cycle
The machine cycle is the standard cycle required to execute the
instruction.
Input
Output structure
Output
I/O
N-channel open-drain
(8)
I/O
N-channel open-drain
(4)
I/O
N-channel open-drain
(4)
Input
(3)
I/O
N-channel open-drain
(4)
I/O
N-channel open-drain
(4)
I/O
CMOS
(4)
and P3 .
2 3
System clock
f(X )
IN
f(X )/2
IN
4513/4514 Group User's Manual
I/O Control Control
unit instructions registers
1 SD, RD
SZD
W6
CLD
4 OP0A PU0, K0
IAP0
4 OP1A PU0, K0
IAP1
3 IAP2 J1
4 OP3A I1, I2
IAP3
4 OP4A Q2
IAP4
4 OP5A FR0
IAP5
HARDWARE
PIN DESCRIPTION
Remark
Built-in programmable pull-up
functions
Key-on wakeup functions
(programmable)
Built-in programmable pull-up
functions
Key-on wakeup functions
(programmable)
Built-in key-on wakeup
function
(P3 /INT0, P3 /INT1)
0 1
1-11