A/D Converter Scan Mode; Debugging Note; Target System Voltage During A Break - Renesas QB-78F1030 User Manual

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QB-78F1030

4.1.11 A/D converter scan mode

If a break occurs while using the A/D converter in scan mode, the A/D converter is not stopped even during the break.
Consequently, it cannot be ascertained which value stored in the conversion result register is the conversion result of the
ANI pin.
If a break occurs while using the A/D converter in scan mode, do not re-execute the program (instead, reset the CPU).
4.2

Debugging Note

4.2.1

Target system voltage during a break

Do not decrease the voltage of the target system during a break.
A reset that is generated by the low-voltage detector (LVI) or by power-on-clear (POC) during a break may cause an
incorrect operation of the debugger or communication errors.
R20UT0289JJ0100 Rev. 1.00
Sep 30, 2010
CHAPTER 4 CAUTIONS
Page 28 of 28

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