Single-Phase Waveform Output Mode - Renesas M16C/29 Series Hardware Manual

M16C/29 Group

13.5.1 Single-Phase Waveform Output Mode

Output level of the OUTC1j pin is inverted when value of the base timer matches that of the G1POj
register (j=0 to 7). The inverted output level is returned to a default output level when the base timer
reaches "0000
16
lists an example of single-phase waveform mode operation.
Table 13.5.1.1. Single-phase Waveform Output Mode Specifications
Item
Output waveform
Waveform output start condition
Waveform output stop condition
Interrupt request
OUTC1j pin(Note 1)
Selectable function
Note 1: The OUTC1
0
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
". Table 13.5.1.1 lists specifications of single-phase waveform mode. Figure 13.5.1.1
• Free-running operation
(the RST1, RST2, and RST4 bits of the G1BCR1 and G1BCR0 registers are set
to "0" (no reset))
Cycle
Default output level :
Inverse level
• The base timer is reset when its value matches that of either register
(a) G1PO0 (enabled by setting bit RST1 to "1", and bits RST4 and RST2 to "0"), or
(b) G1BTRR (enabled by setting bit RST4 to "1", and bits RST2 and RST1 to "0")
Cycle
Default output level :
Inverse level
m : setting value of the G1POj register (j=0 to 7), 0001
n : setting value of the G1PO0 register or the G1BTRR register, 0001
The IFEj bit in the G1FE register should be set to "1" (channel j function enabled)
The IFEj bit should be set to "0" (channel j function disabled)
The G1IRj bit in the interrupt request register is set to "1" when value of the
base timer matches one of the G1POj registers. (See Figure 13.10.)
Pulse output
• Default value set function : Output level is set when waveform output starts
• Inverse output function : Waveform level is inverted to output waveform from
the OUTC1j pin
to OUTC1 pins .
7
page 155 of 402
13. Timer S (Input Capture / Output Compare)
Specification
65536
:
f
BT1
m
f
BT1
65536-m
:
f
BT1
n+2
:
f
BT1
m
f
BT1
n+2-m
:
f
BT1
to FFFD
16 16
to FFFD
16 16