Renesas SuperH Family E10A-USB User Manual
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Renesas SuperH Family E10A-USB User Manual

Superh family e10a-usb emulator
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On April 1
, 2010, NEC Electronics Corporation merged with Renesas Technology
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companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
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  • Page 1 On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding.
  • Page 2 Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as “Specific”...
  • Page 3 SuperH™ Family E10A-USB Emulator Additional Document for User’s Manual Supplementary Information on Using the SH7343 Renesas Microcomputer Development Environment System SuperH™ Family E10A-USB for SH7343 HS7343KCU01HE Rev.1.00 2005.11...
  • Page 5 (iii) prevention against any malfunction or mishap. 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp.

  • Page 7: Table Of Contents

    Section 1 Connecting the Emulator with the User System ...1 Components of the Emulator ... 1 Connecting the Emulator with the User System ... 2 Installing the H-UDI Port Connector on the User System ... 3 Pin Assignments of the H-UDI Port Connector ... 3 Recommended Circuit between the H-UDI Port Connector and the MPU...

  • Page 9: Section 1 Connecting The Emulator With The User System

    Section 1 Connecting the Emulator with the User System Components of the Emulator The E10A-USB emulator supports the SH7343. Table 1.1 lists the components of the emulator. Table 1.1 Components of the Emulator Classi- fication Component Hard- Emulator box ware User system interface cable User system interface...

  • Page 10: Connecting The Emulator With The User System

    Connecting the Emulator with the User System To connect the E10A-USB emulator (hereinafter referred to as the emulator), the H-UDI port connector must be installed on the user system to connect the user system interface cable. When designing the user system, refer to the recommended circuit between the H-UDI port connector and the MPU.

  • Page 11: Installing The H-Udi Port Connector On The User System

    Installing the H-UDI Port Connector on the User System Table 1.3 shows the recommended H-UDI port connectors for the emulator. Table 1.3 Recommended H-UDI Port Connectors Connector Type Number 36-pin connector DX10M-36S DX10M-36SE, DX10G1M-36SE 14-pin connector 2514-6002 Note: When designing the 36-pin connector layout on the user board, do not connect any components under the H-UDI connector.
  • Page 12 Input/ Signal Output AUDCK Output Output AUDATA0 Output AUDATA1 Output AUDATA2 Output AUDATA3 /AUDSYNC Output N.C. N.C. Input Notes: 1. Input to or output from the user system. 2. The symbol (/) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected.
  • Page 13 Pin No. Signal /TRST /ASEBRK / BRKACK /RESETP /RESETA /RESETMFI N.C. (GND) UVCC 10, 12, and 13 Notes: 1. Input to or output from the user system. 2. The symbol (/) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected.

  • Page 14: Recommended Circuit Between The H-Udi Port Connector And The Mpu

    Recommended Circuit between the H-UDI Port Connector and the 1.5.1 Recommended Circuit (36-Pin Type) Figure 1.3 shows a recommended circuit for connection between the H-UDI and AUD port connectors (36 pins) and the MPU when the emulator is in use. Notes: 1.
  • Page 15 When the circuit is connected as shown in figure 1.3, the switches of the emulator are set as SW2 = 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the SuperH Family E10A-USB Emulator User’s Manual. H-UDI port connector (36-pin type) AUDCK...

  • Page 16: Recommended Circuit (14-Pin Type)

    1.5.2 Recommended Circuit (14-Pin Type) Figure 1.4 shows a recommended circuit for connection between the H-UDI and AUD port connectors (14 pins) and the MPU when the emulator is in use. Notes: 1. Do not connect anything to the N.C. pins of the H-UDI port connector. The MPMD pin must be 0 when the emulator is connected and 1 when the emulator is not connected, respectively.
  • Page 17 When the circuit is connected as shown in figure 1.4, the switches of the emulator are set as SW2 = 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the SuperH Family E10A-USB Emulator User’s Manual. H-UDI port connector (14-pin type) TRST...

  • Page 19: Section 2 Software Specifications When Using The Sh7343

    Section 2 Software Specifications when Using the SH7343 Differences between the SH7343 and the Emulator 1. When the emulator system is initiated, it initializes the general registers and part of the control registers as shown in table 2.1. The initial values of the actual SH7343 registers are undefined. When the emulator is initiated from the workspace, a value to be entered is saved in a session.
  • Page 20 3. Low-Power States (Sleep, Software Standby, Module Standby, U Standby, and R Standby) For low-power consumption, the SH7343 has sleep, software standby, module standby, U standby, and R standby states. The sleep, software standby, and module standby states are switched using the SLEEP instruction.
  • Page 21 8. Cache Operation during User Program Break When cache is enabled, the emulator accesses the memory by the following methods: • At memory write: Writes through the cache, then issues a single write to outside. The LRU is not updated. •...
  • Page 22 12. Memory Access during Break In the enabled MMU, when a memory is accessed and a TLB error occurs during break, it can be selected whether the TLB exception is controlled or the program jumps to the user exception handler in [TLB Mode] in the [Configuration] dialog box. When [TLB miss exception is enable] is selected, a “Communication Timeout error”...
  • Page 23 • Verify In the [IO] window, the verify function of the input value is disabled. 15. Illegal Instructions If illegal instructions are executed by STEP-type commands, the emulator cannot go to the next program counter. 16. [Reset CPU] and [Reset Go] in the [Debug] Menu When a reset is issued from [Reset CPU] or [Reset Go] in the [Debug] menu, the clock pulse generator or watchdog timer is not initialized.

  • Page 24: Specific Functions For The Emulator When Using The Sh7343

    Specific Functions for the Emulator when Using the SH7343 2.2.1 Event Condition Functions The emulator is used to set 12 event conditions (Ch1 to Ch12) and the software trace. Table 2.4 lists the conditions of Event Condition. Table 2.4 Types of Event Conditions Event Condition Type Address bus condition (Address) Data bus condition (Data)
  • Page 25 Table 2.5 Dialog Boxes for Setting Event Conditions Function Address Data ASID Dialog Condition Condition Condition (Address) (Data) (ASID) [Event Condition 1] dialog [Event Condition 2] dialog [Event Condition 3] dialog [Event Condition 4] dialog [Event Condition 5] dialog [Event Condition 6] dialog [Event...
  • Page 26 Table 2.5 Dialog Boxes for Setting Event Conditions (cont) Function Address Data ASID Dialog Condition Condition Condition (Address) (Data) (ASID) [Event Condition 9] dialog [Event Condition 10] dialog [Event Condition 11] dialog [Event Condition 12] dialog [Software trace] dialog Notes: O: Can be set in the dialog box.
  • Page 27 Sequential Setting: In the emulator, sequential setting of an Event Condition is enabled. Table 2.6 Sequential Event Conditions Type Event Condition [CPU 2 Channel Ch2 -> 1 Sequential Sequential Event] Page Ch4 -> 3 Ch6 -> 5 Ch11 -> 10 Many Ch3 ->...
  • Page 28 Table 2.6 Sequential Event Conditions (cont) Type Event Condition [CPU CPU Extend Sequential Event] Page (cont) [SystemBus SystemBus Ch9 -> 8 Sequential Sequential Event] Page Event Ch8 -> 9 SystemBus Extend Description Expands the [CPU Sequential Extend] page. The sequential setting is enabled with any combination.
  • Page 29 Sequential Break Extension Setting: Figure 2.1 [CPU Sequential Extend] Page (a) Indicates the channel name for setting conditions. (b) Selects a condition that is satisfied before the channel which sets up conditions. When a channel name is selected, it is required that the condition of the channel selected here must have already been satisfied.
  • Page 30 Usage Example of Sequential Break Extension Setting: A tutorial program provided for the product is used as an example. For the tutorial program, refer to section 6, Tutorial, in the SuperH Family E10A-USB Emulator User’s Manual. The conditions of Event Condition are set as follows: 1.
  • Page 31 Figure 2.2 [Source] Window at Execution Halted (Sequential Break)

  • Page 32: Trace Functions

    2.2.2 Trace Functions The emulator supports the trace functions listed in table 2.7. Table 2.7 Trace Functions Function Branch trace Range memory access trace trace Software Table 2.8 shows the type numbers that the AUD function can be used. Table 2.8 Type Number and AUD Function Type Number HS0005KCU01H HS0005KCU02H...
  • Page 33 Branch Trace Functions: The branch source and destination addresses, their source lines, branch types, and types of accessed bus masters are displayed. [Setting Method] Select the check box in the [Branch] group box in the [Branch trace] page of the [Branch trace] dialog box that opens by double-clicking on the Ch12 (Branch) column of the [Eventpoint] window.
  • Page 34 Range Memory Access Trace Functions: The memory access within the specified range is acquired by a trace. The read cycle, write cycle, or read/write cycle can be selected as the bus type, ASID value, or bus cycle for trace acquisition. [Setting Method] (i) To open the [Event condition 5] or [Event condition 6] dialog box, double-click on the Ch5 (OA) or Ch6 (OA) column of the [Eventpoint] window.
  • Page 35 (iii) Open the [ASID] page, remove the check mark of the [Don’t care] check box, and enter the ASID value to be set. When the ASID value is not set as a condition, do not remove the check mark of the [Don’t care] check box.
  • Page 36 Software Trace Function: Note: This function can be supported with SHC/C++ compiler (manufactured by Renesas Technology Corp.; including OEM and bundle products) V6.0 or later. However, SHC/C++ compiler (including OEM and bundle products) V8.0 or later is needed when instructions other than those compatible with SH4 are output.
  • Page 37 AUD Trace Functions: This function is operational when the AUD pin of the device is connected to the emulator. It is activated by selecting the [AUD trace] radio button in the [Trace type] group box of the [Trace mode] page. Set the trace condition to be used. Table 2.9 shows the AUD trace acquisition mode that can be set in each trace function.
  • Page 38 To set the AUD trace acquisition mode, click the [Trace] window with the right mouse button and select [Setting] from the pop-up menu to display the [Acquisition] dialog box. The AUD trace acquisition mode can be set in the [Trace Mode 1] or [Trace Mode 2] group box in the [Trace Mode] page of the [Acquisition] dialog box.
  • Page 39 Notes on AUD Trace: 1. When the trace display is performed during user program execution, the mnemonics, operands, or source is not displayed. 2. The AUD branch trace function outputs the differences between newly output branch source addresses and previously output branch source addresses. The window trace function outputs the differences between newly output addresses and previously output addresses.
  • Page 40 Memory Output Trace Functions: This function is activated by selecting the [Use Memory trace] radio button in the [Trace type] group box of the [Trace mode] page. In this function, write the trace data in the specified user memory range. Specify the start address to output a trace for the [Start] edit box in the [User memory area] group box, and the end address for the [End Address] edit box.
  • Page 41 To set the memory-output trace acquisition mode, click the [Trace] window with the right mouse button and select [Setting] from the pop-up menu to display the [Acquisition] dialog box. The AUD trace acquisition mode can be set in the [Trace Mode 1] or [Trace Mode 2] group box in the [Trace Mode] page of the [Acquisition] dialog box.

  • Page 42: Notes On Using The Jtag (H-Udi) Clock (Tck) And Aud Clock (Audck)

    Notes: 1. The memory range for which trace is output is the address on the system bus and not supported for the MMU or cache. 2. In the memory range for output, do not specify the ranges that the user program has been downloaded or the user program accesses.
  • Page 43 command setting is disabled. The ASID value of the SH7343 PTEH register during command input is used. When VPMAP_SET command setting is enabled, a BREAKPOINT is set to a physical address into which address translation is made according to the VP_MAP table. However, for addresses out of the range of the VP_MAP table, the address to which a BREAKPOINT is set depends on the SH7343 MMU status during command input.

  • Page 44: Notes On Setting The [Event Condition] Dialog Box And The Breakcondition_ Set Command

    2.2.5 Notes on Setting the [Event Condition] Dialog Box and the BREAKCONDITION_ SET Command 1. When [Go to cursor], [Step In], [Step Over], or [Step Out] is selected, the settings of Event Condition 3 are disabled. 2. When an Event Condition is satisfied, emulation may stop after two or more instructions have been executed.

  • Page 45: Performance Measurement Function

    2.2.8 Performance Measurement Function The emulator supports the performance measurement function. 1. Setting the performance measurement conditions To set the performance measurement conditions, use the [Performance Analysis] dialog box and the PERFORMANCE_SET command. When a channel line on the [Performance Analysis] window is clicked with the right mouse button, the popup menu is displayed and the [Performance Analysis] dialog box is displayed by selecting [Setting].
  • Page 46 Note: For the command line syntax, refer to the online help. (a) Specifying the measurement start/end conditions Set the performance measurement conditions in the [Action] page after conditions have been set in the [Event Condition] dialog box that is opened by double-clicking Ch1 to Ch6 and Ch8 to Ch12 on the [Event Condition] sheet of the [Eventpoint] window.
  • Page 47 Figure 2.9 [Action] Page Note: PA1 or PA2 cannot be set for Ch8 and Ch9.
  • Page 48 (b) Measurement tolerance • The measured value includes tolerance. • Tolerance will be generated before or after a break. For details, see table 2.14. (c) Measurement items Items are measured in the [Performance Analysis] dialog box for each channel from Ch1 to Ch4.
  • Page 49 Table 2.12 Measurement Items Classification Type Disabled Cycle performance Instruction Branch Exception, interruption Measurement Item Option None Elapsed cycles Cycles executed in privileged mode Cycles for asserting the SR.BL bit Number of effective instructions issued Number of 2 instruction executed simultaneously Number of unconditional branch...
  • Page 50 Table 2.12 Measurement Items (cont) Classification Type Stalled performance cycle (cont) performance Instruction bus Instruction performance Measurement Item Option Cycles stalled in full- trace mode (with multi-counts) Cycles stalled in full- trace mode (without multi-counts) Number of UTLB miss for instruction fetch Number of UTLB miss for operand fetch Number of ITLB miss...
  • Page 51 Table 2.12 Measurement Items (cont) Classification Type Instruction bus Instruction performance (cont) (cont) Operand bus Access performance count Measurement Item Option Number of instruction cache miss Number of internal- RAM access for instruction fetch (XY- RAM or L memory) Number of memory access for operand fetch (READ) Number of memory...
  • Page 52 Table 2.12 Measurement Items (cont) Classification Type Operand bus Access performance count (cont) (cont) Access miss count Measurement Item Option Number of internal- RAM access for operand fetch (WRITE) (XY-RAM or L memory) Number of U-RAM access (READ) Number of U-RAM access (WRITE) Number of operand cache miss (READ)
  • Page 53 Table 2.12 Measurement Items (cont) Classification Type Operand bus Waited performance cycle (cont) System bus System bus performance (only available for Ch3 and Ch4) Measurement Item Option Waited cycles for operand fetch (READ) Waited cycles for operand fetch (WRITE) Waited cycles for WCMR operand cache miss (READ)
  • Page 54 Table 2.13 shows the measurement items and methods that are mainly used. Table 2.13 Main Measurement Items Main Measurement Item Elapsed time Number of execution instructions Number of interrupts accepted Number of instruction fetches (for both cache and non-cache) Instruction-cache hit ratio Number of operand accesses (for both cache and non-cache) Operand-cache hit ratio (read)
  • Page 55 Each measurement condition is also counted when conditions in table 2.14 are generated. Table 2.14 Performance Measurement Conditions to be Counted Measurement Condition No caching due to the settings of TLB cacheable Cache-on counting Branch count Notes: 1. In the non-realtime trace mode of the AUD trace and memory output trace, normal counting cannot be performed because the generation state of the stall or the execution cycle is changed.
  • Page 57 Supplementary Information on Using the SH7343 Publication Date: Rev.1.00, November 2, 2005 Published by: Sales Strategic Planning Div. Renesas Technology Corp. Edited by: Customer Support Department Global Strategic Communication Div. Renesas Solutions Corp. © 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
  • Page 58 Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501...
  • Page 59 SuperH™ Family E10A-USB Emulator Additional Document for User’s Manual Supplementary Information on Using the SH7343 1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 Japan REJ10J1147-0100...

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