Detailed Description - Xilinx Virtex-7 VC7203 User Manual

Chapter 1: VC7203 Board Features and Operation
•
The VC7203 board block diagram is shown in
X-Ref Target - Figure 1-1
Power In
12V
DC
FPGA Power Source
Onboard Regulation:
VCCINT 1.0V, 20A
VCCBRAM 1.0V, 10A
VCCAUX 1.8V, 10A
VCCAUX_IO 1.8V, 10A
VCCO_HP 1.8V, 10A
VCCO_HR 1.8V, 10A
VCCO_0 2.5V, 7.5A
Board Utility Power
Onboard Regulation:
5.0V, 10A
3.3V, 18A
2.5V, 18A
Notes
1. GTX transceiver QUAD 111, QUAD 112,
and the FMC3 interface are not available
with the XC7VX485T device.

Detailed Description

Figure 1-2
that is referenced in
Caution!
ESD prevention measures when handling the board.
Caution!
circuits on the back side of the board.
Note:
6
Send Feedback
Active cooling for the FPGA
GTX Transceivers
1
QUAD 111
1
QUAD 112
QUAD 113
QUAD 114
QUAD 115
QUAD 116
QUAD 117
QUAD 118
QUAD 119
System ACE SD
Controller
USB to UART
Bridge
Select I/O Termination
and VTT Jacks
2
I C Bus
Management
PMBus
5V
3.3V
2.5V
VCCO_HR
Figure 1-1: VC7203 Board Block Diagram
shows the VC7203 board described in this user guide. Each numbered feature
Figure 1-2
The VC7203 board can be damaged by electrostatic discharge (ESD). Follow standard
Do not remove the rubber feet from the board. The feet provide clearance to prevent short
Figure 1-2 is for reference only and might not reflect the current revision of the board.
www.xilinx.com
Figure 1-1.
Virtex-7 FPGA
XC7VX485T-3 FFG1761E
Pushbuttons,
User Clocks
DIP Switches,
and LEDs
SuperClock-2 Module
Interface
is described in the sections that follow.
VC7203 GTX Transceiver Characterization Board
FMC1 Interface
High-Performance I/O
FMC2 Interface
High-Performance I/O
FMC3 Interface
1
High-Range I/O
Analog/Digital
Converter (XADC)
12V
7 Series
5V
GTX Power Module
3.3V
Interface
PMBus
GTX
Power Monitoring
UG957_c1_01_120213
UG957 (v1.3) October 17, 2014