Overview Of Watchdog Timer - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 10 WATCHDOG TIMER
10.1

Overview of Watchdog Timer

The watchdog timer is a 2-bit counter operating with an output of the timebase timer or
clock timer as the count clock and resets the CPU when the counter is not cleared for a
preset period of time.
Functions of Watchdog Timer
The watchdog timer is a counter for preventing programs from hanging up. The timer must be cleared at
specified intervals after being activated. If the watchdog timer is not cleared within a certain time due to an
infinite loop of the program, etc., a watchdog reset is generated to the CPU. The interval time of the
watchdog timer can be set by the watchdog timer control register (WDTC), as shown in Table 10.1-1.
When the watchdog timer is not cleared, a watchdog reset occurs following the time between the minimum
time interval and the maximum time interval. The counter must be cleared within the time of the minimum
time interval.
Table 10.1-1 Interval Time of Watchdog Timer
WT1 WT0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
*: Value for when operating at oscillator clock (HCLK) of 6 MHz, sub clock (SCLK) of 32 kHz divided by 4 (= 8 kHz).
The maximum and minimum watchdog timer interval time and the number of oscillation clock cycles are determined by
the timing of clear operation. The interval time will be 3.5 to 4.5 times of the count clock (supplied clock of timebase
timer) cycle. For the watchdog timer interval time, see "10.4 Operations of Watchdog Timer".
Note:
The watchdog counter is a 2-bit counter that counts carry-up signals from the timebase timer.
Therefore, when the timebase timer is cleared, the time period until the occurrence of a watchdog
timer reset may be longer than the preset period of time.
220
WDCS &
SCM
Min.
1 Approx. 2.39 ms
1 Approx. 9.56 ms
1 Approx. 38.23 ms
1 Approx. 305.83 ms
0 Approx. 0.448 s
0 Approx. 3.584 s
0 Approx. 7.168 s
0 Approx. 14.336 s
Interval Time
* *
Max.
Approx. 3.07 ms
Approx. 12.29 ms
Approx. 49.15 ms
Approx. 393.22 ms
Approx. 0.576 s
Approx. 4.608 s
Approx. 9.216 s
Approx. 18.432 s
Clock cycle number
14 ± 2 11
2 /HCLK
16 ± 2 13
2 /HCLK
18 ± 2 15
2 /HCLK
21 ± 2 18
2 /HCLK
12 ± 2 9
2 /SCLK
15 ± 2 12
2 /SCLK
16 ± 2 13
2 /SCLK
17 ± 2 14
2 /SCLK