Input Capture Operation - Renesas H8S/2100 Series Hardware Manual

Section 13 8-Bit Timer (TMR)
13.7.3

Input Capture Operation

TMR_X has input capture registers (TICRR and TICRF). A narrow pulse width can be measured
with TICRR and TICRF, using a single capture. If the falling edge of TMRIX (TMR_X input
capture input signal) is detected after its rising edge has been detected, the value of TCNT_X at
that time is transferred to both TICRR and TICRF.
(1) Input Capture Signal Input Timing
Figure 13.11 shows the timing of the input capture operation.
φ
TMRIX
Input capture
signal
TCNT_X
TICRR
TICRF
If the input capture signal is input while TICRR and TICRF are being read, the input capture
signal is delayed by one system clock (φ) cycle. Figure 13.12 shows the timing of this operation.
φ
TMRIX
Input capture
signal
(Input capture signal is input during TICRR and TICRF read)
Rev. 1.00 Apr. 28, 2008 Page 382 of 994
REJ09B0452-0100
n
M
m
Figure 13.11 Timing of Input Capture Operation
Figure 13.12 Timing of Input Capture Signal
n + 1
n n
m
TICRR, TICRF read cycle
T
1
N N + 1
N
T
2