Agilent Technologies E5071C Manual page 903

E5071C
13 Trace 13 Limit Test Fail
14 Trace 14 Limit Test Fail
15 Not used
Issuing the command will clear all the bits in the questionable limit
*CLS
channel {1-16} status event register.
Status Bit Definitions of the Questionable Limit Channel {1-16}
Extra Status Condition Register
Bit Name
Position
0 Not used
1 Trace 15
Limit Test
Fail
2 Trace 16
Limit Test
Fail
1130
measurement cycle finishes
and returns "fail" as the limit
test result for trace 12.
Set to "0" when a
measurement cycle begins;
set to "1" when the
measurement cycle finishes
and returns "fail" as the limit
test result for trace 13.
Set to "0" when a
measurement cycle begins;
set to "1" when the
measurement cycle finishes
and returns "fail" as the limit
test result for trace 14.
Always 0
Description
Always 0
Set to "0" when a measurement cycle
begins;
set to "1" when the measurement cycle
finishes and returns "fail" as the limit test
result for trace 15.
Set to "0" when a measurement cycle
begins;
set to "1" when the measurement cycle
finishes and returns "fail" as the limit test
result for trace 16.