Dram Eight-Beat Burst Read Timing Configuration—32-Bit Mode - Motorola MPC8240 User Manual

Figure 6-37 shows a 32-bit bus mode burst read operation.
MCLK
RP 1
RC
CP
RAS
CRP
RAH
CAS
RCD 2 CAS 3
ASR
ADDR ROW
ASC
DATA
RAD
WE
Figure 6-37. DRAM Eight-Beat Burst Read Timing Configuration—32-Bit Mode
Figure 6-38 shows a single-beat write operation.
MCLK
RAS
CAS
ADDR
DATA
WE
Figure 6-38. DRAM Single-Beat Write Timing (No ECC)
CSH
PC
CP 4
CAS 5 CAS 5
COL COL COL
CAH
RAC CAH
D0 D1
AA AA
CAC
CAC
RP 1
CRP
CP
ASR
ROW
Chapter 6. MPC8240 Memory Interface
FPM or EDO DRAM Interface Operation
RASP
CP 4
COL COL
D2 D3 D4
RAS
RC
RCD 2 CAS 3
CSH
RSH
RAL
RAH ASC CAH
COL
RAD
DS DH
D0
WCS WCH
WP
RSH
CP 4
CAS 5
COL COL COL
RAL
RHCP
D5 D6 D7
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