Pci Configuration Identification - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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9.3 I
O Interface
2
The intelligent input output (I
architecture-independent I/O subsystems to communicate with an OS through an
abstraction layer. The specification is centered around a message-passing scheme. An
I
O-compliant embedded peripheral (IOP) is comprised of memory, processor, and
2
input/output devices. The IOP dedicates a certain space in its local memory to hold inbound
(from the remote processor) and outbound (to the remote processor) messages. The space
is managed as memory-mapped FIFOs with pointers to this memory maintained through
the MPC8240 I
O registers.
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9.3.1 PCI Configuration Identification
The I
O specification defines extensions for the PCI bus through which message queues are
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managed in hardware. A host identifies an IOP by its PCI class code. Table 9-6 provides the
configuration information available to the host when the I
Table 9-6. I
PCI Configuration
Offset
0x09
0x0A
0x0B
See Section 4.2, "PCI Interface Configuration Registers," for more information on the PCI
base class and programming interface codes. The subclass is described in more detail in the
PCI specification.
9.3.2 I
O Register Summary
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The MPC8240 I
O registers are summarized in Table 9-7.
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Local Memory
PCI Offset
Offset
0x030
0x034
0x040
0x044
0x0_0100
0x0_0104
O) specification was established in the industry to allow
2
O PCI Configuration Identification Register Settings
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Local Memory
Register
Offset
0x09
PCI CFG
0x0A
PCI CFG
0x0B
PCI CFG
Table 9-7. I
O Register Summary
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Acronym
OMISR
Outbound message interrupt status register
OMIMR
Outbound message interrupt mask register
IFQPR
Inbound FIFO queue port register
OFQPR
Outbound FIFO queue port register
IMISR
Inbound message interrupt status register
IMIMR
Inbound message interrupt mask register
Chapter 9. Message Unit (with I
O unit is enabled.
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Description
PCI configuration—Programming interface code
PCI data returned: 0x01
PCI configuration—Sub class
PCI data returned: 0x00
PCI configuration—PCI base class
Data returned: 0x0E
Name
O)
2
I
O Interface
2
9-5

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