Sdram Eight-Beat Burst Read Timing Configuration—32-Bit Mode - Motorola MPC8240 User Manual

SDRAM Interface Operation
Figure 6-10 shows an eight-beat burst read operation.
SDRAM
CLK[0:3]
CKE
CS
SDRAS
SDCAS
ADDR
WE
DQM[0:7]
DATA
Figure 6-10. SDRAM Eight-Beat Burst Read Timing Configuration—32-Bit Mode
Figure 6-11 shows a single-beat write operation.
SDRAM
CLK[0:3]
CKE
CS
SDRAS
SDCAS
ADDR
WE
DQM[0:7]
DATA
Figure 6-11. SDRAM Single Beat Write Timing (SDRAM Burst Length = 4)
6-24
ROW
ACTORW
ROW
ACTORW
D0
MPC8240 Integrated Processor User's Manual
COL
CAS latency
D0 D1 D2 D3 D4 D5 D6 D7
Read
COL
Write
ROW