Motorola MPC8240 User Manual page 544

Integrated host processor with integrated pci
Table of Contents

Advertisement

lis
r4,0x0001
mtctr
r4
MPC8240X4wait200us:
bdnz
MPC8240X4wait200us
// Set MEMGO bit
addis
r3,r0,BMC_BASE// MCCR1 (F0) |= PGMAX
ori
r3,r3,0x00F0
stwbrx r3,0,r5
sync
lwbrx
r4,0,r6
lis
r0, 0x0008
ori
r0, r0, 0x0000
or
r4, r4, r0
stwbrx r4, 0, r6
// Wait again
addis
r4,r0,0x0002
ori
r4,r4,0xffff
mtctr
r4
MPC8240X4wait8ref:
bdnz
MPC8240X4wait8ref
//------ WP1_CNTL_TRIG
addis
r3,r0,BMC_BASE_HIGH
ori
r3,r3,0xF018
stwbrx r3,0,r5
addis
r4,r0,0x0000
ori
r4,r4,0x0180
stwbrx r4,0,r6
//------ WP1_ADDR_TRIG
addis
r3,r0,BMC_BASE_HIGH
ori
r3,r3,0xF01C
stwbrx r3,0,r5
addis
r4,r0,0x0006
ori
r4,r4,0x0000
stwbrx r4,0,r6
//------ WP1_CNTL_MASK
addis
r3,r0,BMC_BASE_HIGH
ori
r3,r3,0xF020
stwbrx r3,0,r5
addis
r4,r0,0x0000
ori
r4,r4,0x0180
stwbrx r4,0,r6
C-6
// old MCCR1
// MEMGO=1
// set the MEMGO bit
// WP1_CNTL_TRIG (0xFF018) =
// WP1_ADDR_TRIG (0xFF01C) =
// Set to 0x60000
// WP1_CNTL_MASK (0xFF020) =
MPC8240 Integrated Processor User's Manual

Advertisement

Table of Contents
loading

Table of Contents