Extended Memory Ending Address Register 1—0X98 - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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Memory Interface Configuration Registers
Table 4-22. Bit Settings for Memory Ending Address Registers 1 and 2 (Continued)
Bits
31–24
Ending address bank 7
23–16
Ending address bank 6
15–8
Ending address bank 5
7–0
Ending address bank 4
Figure 4-13, Figure 4-14, and Table 4-23 depict the extended memory ending address
register 1 and 2 bit settings.
Extended Ending Address 2
Extended Ending Address 3
0 0 0 0 0 0
31
Figure 4-13. Extended Memory Ending Address Register 1—0x98
Extended Ending Address 6
Extended Ending Address 7
0 0 0 0 0 0
31
Figure 4-14. Extended Memory Ending Address Register 2—0x9C
Table 4-23. Bit Settings for Extended Memory Ending Address Registers 1 and 2
Bits
Name
31–26
25–24
Extended ending address 3
23–18
17–16
Extended ending address 2
15–10
9–8
Extended ending address 1
7–2
1–0
Extended ending address 0
4-26
Name
Reset Value
0x00
0x00
0x00
0x00
0 0 0 0 0 0
26 25 24 23
18 17 16 15
0 0 0 0 0 0
26 25 24 23
18 17 16 15
Reset
Value
All 0s
0b00
All 0s
0b00
All 0s
0b00
All 0s
0b00
MPC8240 Integrated Processor User's Manual
Description
Ending address for bank 7
Ending address for bank 6
Ending address for bank 5
Ending address for bank 4
0 0 0 0 0 0
10 9
8
0 0 0 0 0 0
10 9
8
Description
Reserved
Extended ending address for bank 3
Reserved
Extended ending address for bank 2
Reserved
Extended ending address for bank 1
Reserved
Extended ending address for bank 0
Byte Address
0x94
Reserved
Extended Ending Address 1
Extended Ending Address 0
0 0 0 0 0 0
7
2
1
0
Reserved
Extended Ending Address 5
Extended Ending Address 4
0 0 0 0 0 0
7
2
1
0
Byte Address
0x98

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