Address Map B Options; Processor Compatibility Hole And Alias Space - Motorola MPC8240 User Manual

3.2 Address Map B Options

When configured for address map B and host mode, the MPC8240 supports four optional
address mappings by programming the AMBOR register; see Section 4.9, "Address Map B
Options Register—0xE0." The options available are as follows:
• Processor compatibility hole—This optional mapping creates a hole in the local
memory space from 640 Kbytes to 768 Kbytes - 1. Processor core accesses to this
range are forwarded untranslated to PCI memory space. The processor compatibility
hole is provided for software compatibility with existing PC systems that may use
the PCI memory space region from 640 Kbytes to 768 Kbytes - 1 for drivers,
firmware, or buffers. The processor compatibility hole is enabled by setting the
PROC_COMPATIBILITY_HOLE bit in the address map B options register
(AMBOR).
• PCI compatibility hole—This optional mapping creates a hole in the local memory
area of PCI memory space from 640 Kbytes to 1 Mbytes - 1. PCI accesses to this
range are not claimed by the MPC8240. Thus, this range is available to PCI
peripherals (such as video controllers) that require it. The PCI compatibility hole is
provided for software compatibility with existing PC systems that may use the PCI
memory space region from 640 Kbytes to 1 Mbyte - 1 for drivers, firmware, or
buffers. The PCI compatibility hole is enabled by setting
AMBOR[PCI_COMPATIBILITY_HOLE].
• Processor alias space—This optional mapping is used to translate processor
accesses in the 16 Mbyte range starting at 0xFD00_0000 to the first 16 Mbytes of
PCI memory space. The processor alias space is used to access devices that cannot
be located above 16 Mbytes in PCI memory space (for example, ISA-compatible
devices). The processor alias space is enabled by setting
AMBOR[CPU_FD_ALIAS_EN].
• PCI alias space—This optional mapping is used to translate PCI memory space
accesses in the 16 Mbyte range starting at 0xFD00_0000 to the first 16 Mbytes of
local memory. Software may use the PCI alias space to access local memory in the
640 Kbyte to 1 Mbyte range when the PCI compatibility hole is enabled. The PCI
alias space is enabled by setting AMBOR[PCI_FD_ALIAS_EN].

3.2.1 Processor Compatibility Hole and Alias Space

Table 3-5 defines the optional processor compatibility hole and processor alias space and
how they fit into map B.
Chapter 3. Address Maps
Address Map B Options
3-7