Example Edo Debug Address, Miv, And Maa Timings For Burst Read - Motorola MPC8240 User Manual

SDRAM_CLK[0::3]
RAS/CS[0:7]
CAS/DQM[0:7]
ADDRESS
DATA
WE
DEBUG ADDRESS
MIV
MAA
NOTES
:
1. Subscripts identify programmable timing variables (RP 1 , RCD 2 , CAS 3 ).
2. MIV asserts for address and control on the first clock cycle that RAS or CAS is asserted
for a read.
3. MIV asserts for data on the same clock cycle that CAS negates for a read.
Figure 15-10. Example EDO Debug Address, MIV, and MAA Timings for Burst Read
RP
1
RC
CAS
CRP RCD
2
CP
CSH
ROW COL
ASR RAH ASC CAH
RAD
AA
RAC
CAC
VALID
Operation
Chapter 15. Debug Features
Memory Interface Valid (MIV)
RASP
CP CAS CP CAS
3 4 5 4
PC
COL COL
CAH
DATA0 DATA0
AA AA
CAC CAC
VALID VALID
VALID
CP CAS
5 4 5
RSH
COL
RAL
RHCP
DATA0 DA
AA
CAC
VALID
15-11