Powerpc Register Set - Motorola MPC8240 User Manual

instructions required for certain operations. Data is transferred between memory and
registers with explicit load and store instructions only.
Figure 5-2 shows the complete MPC8240 register set and the programming environment to
which each register belongs. This figure includes both the PowerPC register set and the
MPC8240-specific registers.
Note that there may be registers common to other PowerPC processors that are not
implemented in the MPC8240's processor core. Unsupported Special Purpose Register
(SPR) values are treated as follows:
• Any mtspr with an invalid SPR executes as a no-op.
• Any mfspr with an invalid SPR causes boundedly undefined results in the target
register.
Conversely, some SPRs in the processor core may not be implemented at all or may not be
implemented in the same way in other PowerPC processors.

5.3.1.1 PowerPC Register Set

The PowerPC UISA registers, shown in Figure 5-2, can be accessed by either user- or
supervisor-level instructions. The general-purpose registers (GPRs) and floating-point
registers (FPRs) are accessed through instruction operands. Access to registers can be
explicit (that is, through the use of specific instructions for that purpose such as the mtspr
and mfspr instructions) or implicit as part of the execution (or side effect) of an instruction.
Some registers are accessed both explicitly and implicitly.
The number to the right of the register name indicates the number that is used in the syntax
of the instruction operands to access the register (for example, the number used to access
the XER is one). For more information on the PowerPC register set, refer to Chapter 2,
"PowerPC Register Set," in The Programming Environments Manual.
Chapter 5. PowerPC Processor Core
Programming Model
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