A-1 Processor Core Address Map - Motorola MPC8240 User Manual

Processor
0
Local
Local
memory space
memory
cycles
1GB
2GB
PCI bus port
(contiguous 64 Kbytes)
2GB + 64KB
2GB + 8MB
PCI configuration
direct access
2GB + 16MB
PCI I/O
3GB - 8MB
3GB - 16MB
PCI Int Ack
3GB
PCI memory space
4GB - 16MB
Flash ROM
and registers
4GB
Figure A-1. Processor Core Address Map A
MPC8240 Memory Controller
Not forwarded
to PCI bus.
Memory controller
performs local
memory access
Memory select error
Clears A31 (msb) and
changes memory cycle
to PCI I/O cycle
Forwarded to PCI
configuration space
Clears A31 (msb) and
changes memory cycle
to PCI I/O cycle
Int Ack Broadcast to
PCI
Clears A31 and A30
and changes memory
cycle to
PCI memory cycle
Decodes flash ROM
space and performs
ROM access
Appendix A. Address Map A
Address Space for Map A
Reserved
PCI I/O Space
0
I/O addresses
in 0 to 64KB range
64KB
Not addressable
by processor
8MB
Not addressable
by processor
16MB
System I/O in range
16MB to 1GB - 8MB
1GB - 8MB
Not addressable
by processor
1GB
PCI Memory Space
0
PCI memory
space in range
0 to 1GB - 16MB
1GB - 16MB
If local ROM,
not addressable as
PCI memory.
If remote ROM,
PCI memory space
1GB
A-3