Motorola MPC8240 User Manual page 45

Table i. Acronyms and Abbreviated Terms (Continued)
Term
EA Effective address
EAR External access register
ECC Error checking and correction
EDO Extended data out DRAM
ErrDR Error detection register
ErrEnR Error enabling register
FIFO First-in-first-out
FPR Floating-point register
FPSCR Floating-point status and control register
FPU Floating-point unit
GPR General-purpose register
HASH1 Primary hash address
HASH2 Secondary hash address
IABR Instruction address breakpoint register
IBAT Instruction BAT
ICMP Instruction TLB compare
IEEE Institute for Electrical and Electronics Engineers
Int Ack Interrupt acknowledge
IMISS Instruction TLB miss address
IQ Instruction queue
ISA Industry standard architecture
ITLB Instruction translation lookaside buffer
IU Integer unit
JTAG Joint test action group interface
L2 Secondary cache
LIFO Last-in-first-out
LR Link register
LRU Least recently used
LSB Least-significant byte
lsb Least-significant bit
LSU Load/store unit
MICR Memory interface configuration register
MCCR Memory control configuration register
MEI Modified/exclusive/invalid
MESI Modified/exclusive/shared/invalid—cache coherency protocol
MMU Memory management unit
Meaning
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Acronyms and Abbreviations
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