Sdram Paging In Sleep Mode - Motorola MPC8240 User Manual

6.2.7.1 SDRAM Paging in Sleep Mode

Systems attempting to go to sleep with SDRAM paging enabled must ensure that the
following sequence of events occurs in software before the processor core enters sleep
mode:
• Disable page mode by writing 0x00 to MPMR[PGMAX].
• Wait for any open pages to close by allowing a SDRAM refresh interval to elapse;
MCCR[REFINT], bits (15:2)
• Processor core enters sleep mode.
Upon waking from sleep, software must perform the following sequence to re-enable
paging (if so desired).
• Awake from sleep
• Enable page mode by writing the appropriate maximum page open interval based
upon the system design to MPMR[PGMAX] (optional).
6.2.8 SDRAM Interface Timing
To accommodate available memory technology across a wide spectrum of operating
frequencies, the MPC8240 allows the following SDRAM interface timing intervals to be
programmable with granularity of 1 memory clock cycle:
• RDLAT—internal processor core bus data latency from read command
• REFREC—refresh command to activate command interval
• ACTORW—activate command to read or write command interval
• ACTOPRE—activate command to precharge command interval
• PRETOACT—precharge command to activate command interval
• BSTOPRE—burst to precharge command interval (page open interval)
The SDRAM interface timing intervals are defined in Table 6-11.
Chapter 6. MPC8240 Memory Interface
SDRAM Interface Operation
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